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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2019-08-23 15:22:21 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-08-30 10:39:49 +0000 |
| commit | c6f2b6135596c43f4bf467f7b6372b0ad3927e2c (patch) | |
| tree | 4e1490c1daf7e370e34888e8b8e4945144f4955f /src/ec/google/chromeec | |
| parent | a0cd4b18afc82b5a3308ed80cd06c5dfbc5bd193 (diff) | |
soc/intel/skl/acpi: add description for missing PCIe ports
According to the documentation, Sunrise PCH-H [1,2] and Lewisburg PCH
[3] supports up to 16 PCIe ports. However, ACPI contains a description
for only 12 ports. This patch adds ACPI code for missing ports
[1] page 182, Intel (R) 100 Series and Intel (R) C230 Series PCH
Family Platform Controller Hub (PCH), Datasheet, Vol 1 of 2,
December 2018, Document Number: 332690-005EN
[2] page 180, Intel (R) 200 Series and Intel (R) Z370 Series PCH
Family Platform Controller Hub (PCH), Datasheet, Vol 1 of 2,
October 2017, Document Number: 335192-003
[3] page 39, Intel(R) C620 Series Chipset Platform Controller Hub
(PCH) Datasheet, May 2019. Document Number: 336067-007US
Change-Id: I954870136e0c8e5ff5d7ff623c7a6432b829abaf
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/ec/google/chromeec')
0 files changed, 0 insertions, 0 deletions