diff options
| author | Yu-Ping Wu <yupingso@chromium.org> | 2021-01-05 17:05:40 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-08 08:20:54 +0000 |
| commit | 8a82ea9faa63615de5fe1d89588c17c3d43bac59 (patch) | |
| tree | 71d3402f6313638b28ca2b70096eea08b454707f /src/ec/google/chromeec | |
| parent | 9ff7823fe13a5c985dfd43ee72f25709ad39da78 (diff) | |
ec/google/chromeec: Check AP reset cause for watchdog reset
Different from mt8183, mt8192 doesn't need to trigger EC reboot on HW
initiated watchdog reset. Therefore, ec_reset_flags cannot be used to
determine AP watchdog reset. Instead we check the cause of the last AP
reset.
BUG=b:174443398
TEST=emerge-asurada coreboot
TEST=crash.WatchdogCrash passed on asurada
BRANCH=none
Cq-Depend: chromium:2607150
Change-Id: I761ecdd8811e5612b39e96c73442cc796361d0f0
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49113
Reviewed-by: Nicolas Boichat <drinkcat@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/ec/google/chromeec')
| -rw-r--r-- | src/ec/google/chromeec/ec.c | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index ed7f97dc43..26c6054a38 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -993,9 +993,24 @@ static uint16_t google_chromeec_get_uptime_info( bool google_chromeec_get_ap_watchdog_flag(void) { + int i; struct ec_response_uptime_info resp; - return (!google_chromeec_get_uptime_info(&resp) && - (resp.ec_reset_flags & EC_RESET_FLAG_AP_WATCHDOG)); + + if (google_chromeec_get_uptime_info(&resp)) + return false; + + if (resp.ec_reset_flags & EC_RESET_FLAG_AP_WATCHDOG) + return true; + + /* Find the last valid entry */ + for (i = ARRAY_SIZE(resp.recent_ap_reset) - 1; i >= 0; i--) { + if (resp.recent_ap_reset[i].reset_time_ms == 0) + continue; + return (resp.recent_ap_reset[i].reset_cause == + CHIPSET_RESET_AP_WATCHDOG); + } + + return false; } int google_chromeec_i2c_xfer(uint8_t chip, uint8_t addr, int alen, |