diff options
author | Subrata Banik <subrata.banik@intel.com> | 2016-07-21 23:47:38 +0530 |
---|---|---|
committer | Andrey Petrov <andrey.petrov@intel.com> | 2016-07-28 05:17:03 +0200 |
commit | 50b9258a0bbe6cf99606c87a5b9b835ff0689a7d (patch) | |
tree | ca83e704fdc3e5b73f0dd6e6655f9531fc110ebc /src/ec/google/chromeec | |
parent | e4a8537ce20d801a5985ba6268ae83593063a4bf (diff) |
skylake/mainboard: Define mainboard hook in bootblock
Move mainboard post console init functionality (google_chrome_ec_init &
early_gpio programming) from verstage to bootblock.
Add chromeos-ec support in bootblock
BUG=chrome-os-partner:55357
BRANCH=none
TEST=Built and boot kunimitsu till POST code 0x34
Change-Id: I1b912985a0234d103dcf025b1a88094e639d197d
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/15786
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/ec/google/chromeec')
-rw-r--r-- | src/ec/google/chromeec/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc index c4b9c1ad12..aeb950f5ed 100644 --- a/src/ec/google/chromeec/Makefile.inc +++ b/src/ec/google/chromeec/Makefile.inc @@ -1,6 +1,8 @@ ifeq ($(CONFIG_EC_GOOGLE_CHROMEEC),y) +bootblock-y += ec.c bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c +bootblock-$(CONFIG_EC_GOOGLE_CHROMEEC_MEC) += ec_mec.c ramstage-y += ec.c crosec_proto.c vstore.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_I2C) += ec_i2c.c ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c |