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authorEmilie Roberts <hadrosaur@google.com>2024-07-15 15:14:47 +0200
committerEric Lai <ericllai@google.com>2024-07-16 14:22:02 +0000
commite638a113fafe981c224c9d7f7a7701dda5e1fd0b (patch)
treed02a7ee94a1ebbaa6a254d5449d7e89fe39fa5f7 /src/ec/acpi/ec.h
parent494a593d81f40a58132d6e0252c4e4710b41cda2 (diff)
mb/google/brya: Fix pmc_mux port mapping for mithrax and felwinter
Fixes a pmc_mux port mapping error introduced in coreboot commit 4fa8354 Mithrax and felwinter do not have sequential mux_conn[X] to connY mappings which led to the kernel subsystem linking between Type C connectors and USB muxes to be incorrect. The previous patch attempted to fix this by changing the custom_pld layout. However this broke USB usage except for charging. This patch reverts the custom_pld layout and instead changes the pmc hidden and tcss_xhci port mappings to match the hardware layout. BUG=b:352512335 b:329657774 b:121287022 b:321051330 b:204230406 TEST=emerge-${BOARD} coreboot TEST=Manually check that usb-role-switches are mapped to the correct port. Attach USB 3 A to C cable from development machine to left port of DUT. Attach nothing to right-hand port. ectool commands below are only for felwinter as a workaround for devices without a firmware patch to connect superspeed lines. ectool usbpd 0 none ectool usbpd 0 usb ectool usbpd 1 none ectool usbpd 1 usb echo host > /sys/class/typec/port0/usb-role-switch/role (should succeed) ls -l /sys/class/typec/port0/usb-role-switch (note CONX-role-switch) echo host > /sys/class/usb_role/CONX-role-switch/role (should succeed) echo host > /sys/class/typec/port1/usb-role-switch/role (should fail as no cable attached) ls -l /sys/class/typec/port1/usb-role-switch (note CONY-role-switch) echo host > /sys/class/usb_role/CONY-role-switch/role (should fail as no cable attached) BRANCH=firmware-brya-14505.B Change-Id: Iebd259842d3affa259069cd776b46759c1c60712 Signed-off-by: Emilie Roberts <hadrosaur@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83472 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/ec/acpi/ec.h')
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