drivers/genesyslogic/gl9755: Add driver for Genesys Logic GL9755

The device is a PCIe Gen2 to SD 4.0 card reader controller to be
used in the Chromebook. The datasheet name is GL9755S and the revision
is 05.

The patch sets LTR value.

Signed-off-by: Ben Chuang <benchuanggli@gmail.com>
Change-Id: I16048dde348be248c748d50ca4a8a62c8a781430
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

4 files changed, 66 insertions, 0 deletions

diff --git a/src/drivers/genesyslogic/gl9755/Kconfig b/src/drivers/genesyslogic/gl9755/Kconfig
new file mode 100644
index 0000000000..5bccb9b490
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9755/Kconfig
@@ -0,0 +1,7 @@
+config DRIVERS_GENESYSLOGIC_GL9755
+	bool "Genesys Logic GL9755"
+	help
+	  GL9755 is a PCI Express Rev. 2.1 compliant card reader controller
+	  which integrates PCI Express PHY, UHS-II PHY, memory card access
+	  interface, regulators (3.3V-to-1.8V and 3.3V-to-1.2V) and card
+	  power switch.
diff --git a/src/drivers/genesyslogic/gl9755/Makefile.inc b/src/drivers/genesyslogic/gl9755/Makefile.inc
new file mode 100644
index 0000000000..995cfd30f6
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9755/Makefile.inc
@@ -0,0 +1 @@
+ramstage-$(CONFIG_DRIVERS_GENESYSLOGIC_GL9755) += gl9755.c
diff --git a/src/drivers/genesyslogic/gl9755/gl9755.c b/src/drivers/genesyslogic/gl9755/gl9755.c
new file mode 100644
index 0000000000..c3cdef11e7
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9755/gl9755.c
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* Driver for Genesys Logic GL9755 */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/path.h>
+#include <device/pci.h>
+#include <device/pci_ops.h>
+#include <device/pci_ids.h>
+#include "gl9755.h"
+
+static void gl9755_init(struct device *dev)
+{
+	printk(BIOS_INFO, "GL9755: init\n");
+	pci_dev_init(dev);
+
+	/* Set Vendor Config to be configurable */
+	pci_or_config32(dev, CFG, CFG_EN);
+	/* Set LTR value */
+	pci_write_config32(dev, LTR, NO_SNOOP_SCALE|NO_SNOOP_VALUE|SNOOP_SCALE|SNOOP_VALUE);
+	/* Set Vendor Config to be non-configurable */
+	pci_and_config32(dev, CFG, ~CFG_EN);
+}
+
+static struct device_operations gl9755_ops = {
+	.read_resources		= pci_dev_read_resources,
+	.set_resources		= pci_dev_set_resources,
+	.enable_resources	= pci_dev_enable_resources,
+	.ops_pci		= &pci_dev_ops_pci,
+	.init			= gl9755_init,
+};
+
+static const unsigned short pci_device_ids[] = {
+	PCI_DEVICE_ID_GLI_9755,
+	0
+};
+
+static const struct pci_driver genesyslogic_gl9755 __pci_driver = {
+	.ops		= &gl9755_ops,
+	.vendor		= PCI_VENDOR_ID_GLI,
+	.devices	= pci_device_ids,
+};
+
+struct chip_operations drivers_generic_genesyslogic_gl9755_ops = {
+	CHIP_NAME("Genesys Logic GL9755")
+};
diff --git a/src/drivers/genesyslogic/gl9755/gl9755.h b/src/drivers/genesyslogic/gl9755/gl9755.h
new file mode 100644
index 0000000000..2d20faf695
--- /dev/null
+++ b/src/drivers/genesyslogic/gl9755/gl9755.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* Definitions for Genesys Logic GL9755 */
+
+#define CFG		0x800
+#define   CFG_EN	0x1
+#define LTR			0x5C
+#define   SNOOP_VALUE		0x25
+#define   SNOOP_SCALE		(0x3 << 10)
+#define   NO_SNOOP_VALUE	(0x25 << 16)
+#define   NO_SNOOP_SCALE	(0x3 << 26)