diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2016-03-14 09:29:09 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-29 23:33:39 +0200 |
| commit | fe4983e5aa0a9d3228d3634116be88e361ec23c3 (patch) | |
| tree | 44ab424b302bc9d3e5f22cf17590f3669e385839 /src/drivers | |
| parent | 92658db3ca00b230a7effd5408d0492a44f9b3f3 (diff) | |
intel/fsp1_1: Do not re-init TPM in romstage if already setup in verstage
For platforms that do verification of memory init (and have verstage
execute before romstage) FSP should not attempt to re-initialize the
TPM again in romstage as it has already been done.
BUG=chrome-os-partner:50633
BRANCH=glados
TEST=boot and resume on chell and ensure TPM is not re-initialized
Change-Id: Ied6f39dc8dacdbc3d76070b6135de2308196ff53
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fefd4d4b3fde4c7fe4b6de304790914b7a2f87d8
Original-Change-Id: I60a2e4e2d73270697218f094527e09d444e6ab56
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Previous-Reviewed-on: https://chromium-review.googlesource.com/332433
Original-(cherry picked from commit 2de1fd57fe1db7960e0bb86c64dccf827fa55742)
Original-Reviewed-on: https://chromium-review.googlesource.com/332299
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14106
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/intel/fsp1_1/romstage.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index bf84d662af..3d698bb363 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -173,8 +173,15 @@ void romstage_common(struct romstage_params *params) hard_reset(); } - if (IS_ENABLED(CONFIG_LPC_TPM)) - init_tpm(params->power_state->prev_sleep_state == SLEEP_STATE_S3); + /* + * Initialize the TPM, unless the TPM was already initialized + * in verstage and used to verify romstage. + */ + if (IS_ENABLED(CONFIG_LPC_TPM) && + !IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) && + !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) + init_tpm(params->power_state->prev_sleep_state == + SLEEP_STATE_S3); } void after_cache_as_ram_stage(void) |