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authorArthur Heymans <arthur@aheymans.xyz>2023-08-02 19:52:45 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-08-10 12:39:08 +0000
commite67513e353cd5fa5793e973cf0679a332d930e05 (patch)
tree43d7a1fc63198c232e2e17c647d05efd3d727e55 /src/drivers
parentdb20a08b654ad15715926857dd9c4d52eef0ac45 (diff)
drivers/uart/pl011: Fix regwidth
Width of registers are always dwords on pl011, not bytes. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: I955319d31bba5c0cd4d50f2b34111d51fea653ed Reviewed-on: https://review.coreboot.org/c/coreboot/+/76883 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/uart/pl011.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c
index 0661de174f..64c279d1b4 100644
--- a/src/drivers/uart/pl011.c
+++ b/src/drivers/uart/pl011.c
@@ -40,7 +40,7 @@ enum cb_err fill_lb_serial(struct lb_serial *serial)
serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial->baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial->baud = get_uart_baudrate();
- serial->regwidth = 1;
+ serial->regwidth = 4;
serial->input_hertz = uart_platform_refclk();
return CB_SUCCESS;