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author | Nina Wu <nina-cm.wu@mediatek.corp-partner.google.com> | 2021-03-16 14:29:12 +0800 |
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committer | Hung-Te Lin <hungte@chromium.org> | 2021-03-17 00:33:27 +0000 |
commit | a94fea1ee444b8f1359729064cd72c963d36ad3f (patch) | |
tree | 6d3b85ae5fb3cfa6c7c8aeead38183167fafbec3 /src/drivers | |
parent | 535846763825f9bc4531b9322b1b61f3973cd6f8 (diff) |
vendorcode/mt8192: devapc: fix register offset for PCIe domain
Correct the wrong offset for setting PCIe domain.
Change-Id: I9de2bdf5a0a4fb5b34985b11976fd50b397e97ba
Signed-off-by: Nina Wu <nina-cm.wu@mediatek.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51512
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
0 files changed, 0 insertions, 0 deletions