diff options
author | Martin Roth <gaumless@gmail.com> | 2023-09-03 21:38:29 -0600 |
---|---|---|
committer | Elyes Haouas <ehaouas@noos.fr> | 2023-09-08 00:53:57 +0000 |
commit | 74f18777a2e6919172a4214c3195bfcc48f48407 (patch) | |
tree | 792af40f72ed0f4287239a707acce3edbe89c9d2 /src/drivers | |
parent | cef239675b46ffec6c3c4a99875329f0ee92a6b5 (diff) |
arch to drivers/intel: Fix misspellings & capitalization issues
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ic52f01d1d5d86334e0fd639b968b5eed43a35f1d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77633
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
-rw-r--r-- | src/drivers/analogix/anx7625/anx7625.h | 2 | ||||
-rw-r--r-- | src/drivers/aspeed/common/ast_main.c | 2 | ||||
-rw-r--r-- | src/drivers/i2c/rtd2132/chip.h | 2 | ||||
-rw-r--r-- | src/drivers/i2c/tpm/cr50.c | 2 | ||||
-rw-r--r-- | src/drivers/i2c/ww_ring/ww_ring.c | 4 | ||||
-rw-r--r-- | src/drivers/i2c/ww_ring/ww_ring.h | 4 | ||||
-rw-r--r-- | src/drivers/i2c/ww_ring/ww_ring_programs.c | 2 | ||||
-rw-r--r-- | src/drivers/intel/dptf/dptf.c | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/util.h | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/raminit.c | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp1_1/romstage.c | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp2_0/fsp_gop_blt.c | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp2_0/fsp_timestamp.c | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp2_0/hand_off_block.c | 4 | ||||
-rw-r--r-- | src/drivers/intel/fsp2_0/hob_display.c | 4 | ||||
-rw-r--r-- | src/drivers/intel/fsp2_0/include/fsp/util.h | 2 | ||||
-rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 2 | ||||
-rw-r--r-- | src/drivers/intel/gma/i915_reg.h | 12 | ||||
-rw-r--r-- | src/drivers/intel/gma/opregion.h | 2 | ||||
-rw-r--r-- | src/drivers/intel/mipi_camera/chip.h | 2 |
20 files changed, 29 insertions, 29 deletions
diff --git a/src/drivers/analogix/anx7625/anx7625.h b/src/drivers/analogix/anx7625/anx7625.h index bba42cb61a..f14f8bd0a6 100644 --- a/src/drivers/analogix/anx7625/anx7625.h +++ b/src/drivers/analogix/anx7625/anx7625.h @@ -189,7 +189,7 @@ #define AP_AV_STATUS 0x28 #define AP_VIDEO_CHG (1<<2) #define AP_AUDIO_CHG (1<<3) -#define AP_MIPI_MUTE (1<<4) /* 1:MIPI input mute, 0: ummute */ +#define AP_MIPI_MUTE (1<<4) /* 1:MIPI input mute, 0: unmute */ #define AP_MIPI_RX_EN (1<<5) /* 1: MIPI RX input in 0: no RX in */ #define AP_DISABLE_PD (1<<6) #define AP_DISABLE_DISPLAY (1<<7) diff --git a/src/drivers/aspeed/common/ast_main.c b/src/drivers/aspeed/common/ast_main.c index 8dccb45322..b28f6a675d 100644 --- a/src/drivers/aspeed/common/ast_main.c +++ b/src/drivers/aspeed/common/ast_main.c @@ -440,7 +440,7 @@ int ast_driver_load(struct drm_device *dev, unsigned long flags) if (ret) goto out_free; ast->vram_size = ast_get_vram_info(dev); - DRM_INFO("dram MCLK=%u Mhz type=%d bus_width=%d size=%08x\n", + DRM_INFO("dram MCLK=%u MHz type=%d bus_width=%d size=%08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size); } diff --git a/src/drivers/i2c/rtd2132/chip.h b/src/drivers/i2c/rtd2132/chip.h index b65182feeb..50ea7d5314 100644 --- a/src/drivers/i2c/rtd2132/chip.h +++ b/src/drivers/i2c/rtd2132/chip.h @@ -11,7 +11,7 @@ struct drivers_i2c_rtd2132_config { u16 t4; /* Delay from backlight output disable to PWM output disable. */ u16 t5; /* Delay from PWM output disable to LVDS output disable. */ u16 t6; /* Delay from LVDS output disable to panel Vcc disable. */ - u16 t7; /* Delay between tweo panel power on/off sequence. */ + u16 t7; /* Delay between two panel power on/off sequence. */ /* * LVDS swap. diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c index 7c0c488658..ff1b3a0e3f 100644 --- a/src/drivers/i2c/tpm/cr50.c +++ b/src/drivers/i2c/tpm/cr50.c @@ -123,7 +123,7 @@ static int cr50_i2c_write(uint8_t addr, const uint8_t *buffer, size_t len) } /* - * Cr50 processes reset requests asynchronously and consceivably could be busy + * Cr50 processes reset requests asynchronously and conceivably could be busy * executing a long command and not reacting to the reset pulse for a while. * * This function will make sure that the AP does not proceed with boot until diff --git a/src/drivers/i2c/ww_ring/ww_ring.c b/src/drivers/i2c/ww_ring/ww_ring.c index 98c162bb4d..3956a19841 100644 --- a/src/drivers/i2c/ww_ring/ww_ring.c +++ b/src/drivers/i2c/ww_ring/ww_ring.c @@ -310,7 +310,7 @@ static int ledc_init_validate(TiLp55231 *ledc) } /* - * Signal Depthcharge that the controller has been initiazed by + * Signal Depthcharge that the controller has been initialized by * coreboot. */ data = LP55231_VARIABLE_COOKIE; @@ -340,7 +340,7 @@ int ww_ring_display_pattern(unsigned int i2c_bus, enum display_pattern pattern) /* * First stop all running programs to avoid - * inerference between the controllers. + * interference between the controllers. */ for (j = 0; j < WW_RING_NUM_LED_CONTROLLERS; j++) { if (!lp55231s[j].dev_addr) diff --git a/src/drivers/i2c/ww_ring/ww_ring.h b/src/drivers/i2c/ww_ring/ww_ring.h index db724d3704..b43b9b851b 100644 --- a/src/drivers/i2c/ww_ring/ww_ring.h +++ b/src/drivers/i2c/ww_ring/ww_ring.h @@ -5,12 +5,12 @@ /* * Different types of display patterns to be shown by the LED ring while - * contrlled by coreboot. + * controlled by coreboot. */ enum display_pattern { WWR_ALL_OFF, /* Turn the LEDs off. */ WWR_RECOVERY_PUSHED, /* Recovery button push detected on start up. */ - WWR_WIPEOUT_REQUEST, /* Held long enough for wipout request. */ + WWR_WIPEOUT_REQUEST, /* Held long enough for wipeout request. */ WWR_RECOVERY_REQUEST, /* Held long enough for recovery request. */ WWR_NORMAL_BOOT /* No buttons pressed, normal boot sequence. */ }; diff --git a/src/drivers/i2c/ww_ring/ww_ring_programs.c b/src/drivers/i2c/ww_ring/ww_ring_programs.c index 73dd4dabf1..da7cafc173 100644 --- a/src/drivers/i2c/ww_ring/ww_ring_programs.c +++ b/src/drivers/i2c/ww_ring/ww_ring_programs.c @@ -89,7 +89,7 @@ static const TiLp55231Program solid_000000_program = { * The three internal engines seem to be competing for resources and get out * of sync in seconds if left running asynchronously. * - * When solid patterns are deployed with instanteneous color intensity + * When solid patterns are deployed with instantaneous color intensity * changes, all three LEDs can be controlled by one engine in sequential * accesses. But the controllers still need to be synchronized. * diff --git a/src/drivers/intel/dptf/dptf.c b/src/drivers/intel/dptf/dptf.c index fb7cb85e75..f616d759e8 100644 --- a/src/drivers/intel/dptf/dptf.c +++ b/src/drivers/intel/dptf/dptf.c @@ -537,7 +537,7 @@ static void write_device_definitions(const struct device *dev) acpigen_pop_len(); /* Scope */ } -/* Emites policy definitions for each policy type */ +/* Emits policy definitions for each policy type */ static void write_policies(const struct drivers_intel_dptf_config *config) { dptf_write_enabled_policies(config->policies.active, DPTF_MAX_ACTIVE_POLICIES, diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h index 2f927607c2..69d7cf6ce2 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/util.h +++ b/src/drivers/intel/fsp1_1/include/fsp/util.h @@ -29,7 +29,7 @@ void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old, uint64_t new); void report_fsp_output(void); -/* Return version of FSP associated with fih. */ +/* Return version of FSP associated with FIH. */ static inline uint32_t fsp_version(FSP_INFO_HEADER *fih) { return fih->ImageRevision; diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index dd35b0f228..894f9ccc24 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -239,7 +239,7 @@ void raminit(struct romstage_params *params) mrc_hob = get_guid_hob(&mrc_guid, hob_list_ptr); if (mrc_hob == NULL) { printk(BIOS_DEBUG, - "Memory Configuration Data Hob not present\n"); + "Memory Configuration Data HOB not present\n"); } else { params->data_to_save = GET_GUID_HOB_DATA(mrc_hob); params->data_to_save_size = ALIGN_UP( diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index dc890642a2..b3137111ff 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -85,7 +85,7 @@ static void raminit_common(struct romstage_params *params) if (!s3wake) mainboard_save_dimm_info(params); - /* Create romstage handof information */ + /* Create romstage handoff information */ if (romstage_handoff_init( params->power_state->prev_sleep_state == ACPI_S3) < 0) /* FIXME: A "system" reset is likely enough: */ diff --git a/src/drivers/intel/fsp2_0/fsp_gop_blt.c b/src/drivers/intel/fsp2_0/fsp_gop_blt.c index a5d55c1d85..5ccec593f5 100644 --- a/src/drivers/intel/fsp2_0/fsp_gop_blt.c +++ b/src/drivers/intel/fsp2_0/fsp_gop_blt.c @@ -207,7 +207,7 @@ static void *fill_blt_buffer(efi_bmp_image_header *header, gop_blt->Red = *bmp_image; break; - /* Conver 32 bit to 24bit bmp - just ignore the final byte of each pixel */ + /* Convert 32 bit to 24bit bmp - just ignore the final byte of each pixel */ case 32: gop_blt->Blue = *bmp_image++; gop_blt->Green = *bmp_image++; diff --git a/src/drivers/intel/fsp2_0/fsp_timestamp.c b/src/drivers/intel/fsp2_0/fsp_timestamp.c index c3ad331218..4e50f8547e 100644 --- a/src/drivers/intel/fsp2_0/fsp_timestamp.c +++ b/src/drivers/intel/fsp2_0/fsp_timestamp.c @@ -32,7 +32,7 @@ struct generic_event_record { } __packed; /* - * Performance Hob: + * Performance HOB: * GUID - fpdt_guid; * Data - FPDT_PEI_EXT_PERF_HEADER one or more FPDT records */ diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c index 0e6a39f0ee..5339065b1a 100644 --- a/src/drivers/intel/fsp2_0/hand_off_block.c +++ b/src/drivers/intel/fsp2_0/hand_off_block.c @@ -107,10 +107,10 @@ static void save_hob_list(int is_recovery) const void *hob_list; cbmem_loc = cbmem_add(CBMEM_ID_FSP_RUNTIME, sizeof(*cbmem_loc)); if (cbmem_loc == NULL) - die("Error: Could not add cbmem area for hob list.\n"); + die("Error: Could not add cbmem area for HOB list.\n"); hob_list = fsp_get_hob_list(); if (!hob_list) - die("Error: Could not locate hob list pointer.\n"); + die("Error: Could not locate HOB list pointer.\n"); *cbmem_loc = (uintptr_t)hob_list; } diff --git a/src/drivers/intel/fsp2_0/hob_display.c b/src/drivers/intel/fsp2_0/hob_display.c index 93406636fe..b86b79b138 100644 --- a/src/drivers/intel/fsp2_0/hob_display.c +++ b/src/drivers/intel/fsp2_0/hob_display.c @@ -123,7 +123,7 @@ const char *fsp_get_hob_type_name(const struct hob_header *hob) if (hob->type == hob_type_names[index].type) return hob_type_names[index].name; - /* Get name for SOC specific hob */ + /* Get name for SOC specific HOB */ name = soc_get_hob_type_name(hob); if (name != NULL) return name; @@ -162,7 +162,7 @@ void fsp_print_guid_extension_hob(const struct hob_header *hob) fsp_print_guid(BIOS_SPEW, res->owner_guid); printk(BIOS_SPEW, ": %s\n", fsp_get_guid_name(res->owner_guid)); - /* Some of the SoC FSP specific hobs are of type HOB_TYPE_GUID_EXTENSION */ + /* Some of the SoC FSP specific HOBs are of type HOB_TYPE_GUID_EXTENSION */ soc_display_hob(hob); } diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h index 8fdd178d79..75b9ad844e 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/util.h +++ b/src/drivers/intel/fsp2_0/include/fsp/util.h @@ -123,7 +123,7 @@ enum cb_err fsp_hob_iterator_get_next_guid_extension(const struct hob_header **h const uint8_t guid[16], const void **data, size_t *size); -/* Function to extract the FSP timestamp from FPDT Hob and display */ +/* Function to extract the FSP timestamp from FPDT HOB and display */ void fsp_display_timestamp(void); const void *fsp_get_hob_list(void); void *fsp_get_hob_list_ptr(void); diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 4706dce813..c5920867f3 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -80,7 +80,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t version) save_memory_training_data(); } - /* Create romstage handof information */ + /* Create romstage handoff information */ romstage_handoff_init(s3wake); } diff --git a/src/drivers/intel/gma/i915_reg.h b/src/drivers/intel/gma/i915_reg.h index 377f903292..8a7ccf77fd 100644 --- a/src/drivers/intel/gma/i915_reg.h +++ b/src/drivers/intel/gma/i915_reg.h @@ -15,7 +15,7 @@ * The Bridge device's PCI config space has information about the * fb aperture size and the amount of pre-reserved memory. * This is all handled in the intel-gtt.ko module. i915.ko only - * cares about the vga bit for the vga rbiter. + * cares about the vga bit for the vga arbiter. */ #define INTEL_GMCH_CTRL 0x52 #define INTEL_GMCH_VGA_DISABLE (1 << 1) @@ -1384,7 +1384,7 @@ #define SDVOC_GANG_MODE (1 << 16) #define SDVO_ENCODING_SDVO (0x0 << 10) #define SDVO_ENCODING_HDMI (0x2 << 10) -/** Requird for HDMI operation */ +/** Required for HDMI operation */ #define SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9) #define SDVO_COLOR_RANGE_16_235 (1 << 8) #define SDVO_BORDER_ENABLE (1 << 7) @@ -1485,7 +1485,7 @@ /* Video Data Island Packet control */ #define VIDEO_DIP_DATA 0x61178 -/* Read the description of VIDEO_DIP_DATA (before Haswel) or VIDEO_DIP_ECC +/* Read the description of VIDEO_DIP_DATA (before Haswell) or VIDEO_DIP_ECC * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each byte * of the infoframe structure specified by CEA-861. */ #define VIDEO_DIP_DATA_SIZE 32 @@ -1630,7 +1630,7 @@ #define BLC_HIST_CTL 0x61260 /* New registers for PCH-split platforms. Safe where new bits show up, the - * register layout machtes with gen4 BLC_PWM_CTL[12]. */ + * register layout matches with gen4 BLC_PWM_CTL[12]. */ #define BLC_PWM_CPU_CTL2 0x48250 #define BLC_PWM2_ENABLE (1UL<<31) #define BLC_PWM_CPU_CTL 0x48254 @@ -2037,7 +2037,7 @@ /** Sets the rollover for the second subcarrier phase generation DDA */ # define TV_SCDDA2_SIZE_MASK 0x7fff0000 # define TV_SCDDA2_SIZE_SHIFT 16 -/** Sets the increent of the second subcarrier phase generation DDA */ +/** Sets the increment of the second subcarrier phase generation DDA */ # define TV_SCDDA2_INC_MASK 0x00007fff # define TV_SCDDA2_INC_SHIFT 0 @@ -2045,7 +2045,7 @@ /** Sets the rollover for the third subcarrier phase generation DDA */ # define TV_SCDDA3_SIZE_MASK 0x7fff0000 # define TV_SCDDA3_SIZE_SHIFT 16 -/** Sets the increent of the third subcarrier phase generation DDA */ +/** Sets the increment of the third subcarrier phase generation DDA */ # define TV_SCDDA3_INC_MASK 0x00007fff # define TV_SCDDA3_INC_SHIFT 0 diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h index 1dd177c2db..7b6a85db52 100644 --- a/src/drivers/intel/gma/opregion.h +++ b/src/drivers/intel/gma/opregion.h @@ -127,7 +127,7 @@ typedef struct { u32 aslc; /* Offset 4 ASLE interrupt command / status */ u32 tche; /* Offset 8 Technology enabled indicator */ u32 alsi; /* Offset 12 Current ALS illuminance reading */ - u32 bclp; /* Offset 16 Backlight britness to set */ + u32 bclp; /* Offset 16 Backlight brightness to set */ u32 pfit; /* Offset 20 Panel fitting Request */ u32 cblv; /* Offset 24 Brightness Current State */ u16 bclm[20]; /* Offset 28 Backlight Brightness Level Duty diff --git a/src/drivers/intel/mipi_camera/chip.h b/src/drivers/intel/mipi_camera/chip.h index 9d8291e4d5..ecf371458b 100644 --- a/src/drivers/intel/mipi_camera/chip.h +++ b/src/drivers/intel/mipi_camera/chip.h @@ -112,7 +112,7 @@ struct resource_config { struct clk_config { /* IMGCLKOUT_x being used for a port */ uint8_t clknum; - /* frequency setting: 0:24Mhz, 1:19.2 Mhz */ + /* frequency setting: 0:24MHz, 1:19.2 MHz */ uint8_t freq; }; |