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authorBen Chuang <benchuanggli@gmail.com>2021-02-05 17:33:38 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-05-05 11:45:06 +0000
commit60243501f23cdc512f6e4c1a4277b6e0c355aa48 (patch)
tree5419fa68f917f4c3aa463d8bbeee81a96f531357 /src/drivers
parent24f7d2e80f51b68534b3785dbd5420f2dd0f1f38 (diff)
drivers/genesyslogic/gl9755: Disable debug mode to enable circuit protections
In order for short circuit protection and over current protection to work, the debug mode needs to be turned off. BUG=b:185749961 TEST=build and test Signed-off-by: Ben Chuang <benchuanggli@gmail.com> Change-Id: Iacfa3c668a52d1bae15fe82f1c614d0ebd93a957 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51000 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/genesyslogic/gl9755/gl9755.c3
-rw-r--r--src/drivers/genesyslogic/gl9755/gl9755.h2
2 files changed, 5 insertions, 0 deletions
diff --git a/src/drivers/genesyslogic/gl9755/gl9755.c b/src/drivers/genesyslogic/gl9755/gl9755.c
index 6dfac47293..a5778e3924 100644
--- a/src/drivers/genesyslogic/gl9755/gl9755.c
+++ b/src/drivers/genesyslogic/gl9755/gl9755.c
@@ -28,6 +28,9 @@ static void gl9755_enable(struct device *dev)
reg |= CFG2_LAT_L1_64US;
pci_write_config32(dev, CFG2, reg);
+ /* Turn off debug mode to enable SCP/OCP */
+ pci_and_config32(dev, CFG3, ~SCP_DEBUG);
+
/* Set Vendor Config to be non-configurable */
pci_and_config32(dev, CFG, ~CFG_EN);
}
diff --git a/src/drivers/genesyslogic/gl9755/gl9755.h b/src/drivers/genesyslogic/gl9755/gl9755.h
index aa20a527f2..bc347fb16b 100644
--- a/src/drivers/genesyslogic/gl9755/gl9755.h
+++ b/src/drivers/genesyslogic/gl9755/gl9755.h
@@ -15,5 +15,7 @@
#define SNOOP_SCALE (0x3 << 10)
#define NO_SNOOP_VALUE (0x25 << 16)
#define NO_SNOOP_SCALE (0x3 << 26)
+#define CFG3 0x70
+#define SCP_DEBUG (0x1 << 19)
#endif /* DRIVERS_GENESYSLOGIC_GL9755_H */