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authorAngel Pons <th3fanbus@gmail.com>2024-05-06 13:37:11 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2024-06-05 10:59:59 +0000
commit4e5655a7567cc9b34caec56f14ae5da56e04d5d3 (patch)
treee6d7fefff13282363d6c12cae02e67f36ff55e57 /src/drivers
parente1664278a7d7911432c910721ee5f3510678ceb0 (diff)
Xeon-SP boards: Factor out OCP VPD `get_cxl_mode()` impl
There's two copies of the `get_cxl_mode()` function to map the OCP VPD value to the values expected by platform code. As this is unnecessary, have a single copy of this function in the OCP VPD driver code. As the `get_cxl_mode()` function is Xeon-SP only, keep it in a separate file. This change simplifies things for boards using OCP VPD for CXL and has no impact for boards *not* using OCP VPD: - Boards not using OCP VPD can still define get_cxl_mode() in mainboard code as needed, just like they were able to do before. - Boards using OCP VPD but without CXL (`SOC_INTEL_HAS_CXL` is not enabled), this code won't get compiled in at all (see `Makefile.mk`). - Boards using OCP VPD and CXL will automatically make use of this `get_cxl_mode()` definition, which should be the same for all boards. It is possible that this may need to be expanded/adapted in the future, which is easy to handle in a follow-up commit when the need arises. TEST=Build and boot on intel/archercity CRB Change-Id: I935c4eb5b2392e2d0dc01b9f66d46c79b8141ea7 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82224 Reviewed-by: Shuo Liu <shuo.liu@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/ocp/vpd/Makefile.mk11
-rw-r--r--src/drivers/ocp/vpd/xeonsp_cxl.c17
2 files changed, 26 insertions, 2 deletions
diff --git a/src/drivers/ocp/vpd/Makefile.mk b/src/drivers/ocp/vpd/Makefile.mk
index 1cdc63b524..29aad05374 100644
--- a/src/drivers/ocp/vpd/Makefile.mk
+++ b/src/drivers/ocp/vpd/Makefile.mk
@@ -1,7 +1,14 @@
## SPDX-License-Identifier: GPL-2.0-only
-romstage-$(CONFIG_OCP_VPD) += vpd_util.c
-ramstage-$(CONFIG_OCP_VPD) += vpd_util.c
+ifeq ($(CONFIG_OCP_VPD),y)
+romstage-y += vpd_util.c
+ramstage-y += vpd_util.c
+ifeq ($(CONFIG_XEON_SP_COMMON_BASE),y)
+romstage-$(CONFIG_SOC_INTEL_HAS_CXL) += xeonsp_cxl.c
+ramstage-$(CONFIG_SOC_INTEL_HAS_CXL) += xeonsp_cxl.c
+endif
+endif
+
ramstage-$(CONFIG_LINUXPAYLOAD_CMDLINE_VPD_OVERWRITE) += vpd_cmdline.c
ifeq ($(CONFIG_VPD),y)
all-$(CONFIG_CONSOLE_OVERRIDE_LOGLEVEL) += loglevel_vpd.c
diff --git a/src/drivers/ocp/vpd/xeonsp_cxl.c b/src/drivers/ocp/vpd/xeonsp_cxl.c
new file mode 100644
index 0000000000..92a8eba0f8
--- /dev/null
+++ b/src/drivers/ocp/vpd/xeonsp_cxl.c
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <drivers/ocp/include/vpd.h>
+#include <soc/config.h>
+
+enum xeonsp_cxl_mode get_cxl_mode(void)
+{
+ int ocp_cxl_mode = get_cxl_mode_from_vpd();
+ switch (ocp_cxl_mode) {
+ case CXL_SYSTEM_MEMORY:
+ return XEONSP_CXL_SYS_MEM;
+ case CXL_SPM:
+ return XEONSP_CXL_SP_MEM;
+ default:
+ return XEONSP_CXL_DISABLED;
+ }
+}