diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-09 14:00:44 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-18 16:00:45 +0000 |
| commit | 799c3219146c8d246ef95f1fdb83dc7bc1f2be61 (patch) | |
| tree | e6dcc99fe3b577d28b602311232779eff8dda4cb /src/drivers | |
| parent | 9cbbba68b650933cf552f9e1b969f08e463c641f (diff) | |
cbmem_top_chipset: Change the return value to uintptr_t
Get rid of a lot of casts.
Change-Id: I93645ef5dd270905ce421e68e342aff4c331eae6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Diffstat (limited to 'src/drivers')
| -rw-r--r-- | src/drivers/amd/agesa/romstage.c | 4 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/cbmem.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 5c3d90494f..132cb3e485 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -93,8 +93,8 @@ static void ap_romstage_main(void) halt(); } -void *cbmem_top_chipset(void) +uintptr_t cbmem_top_chipset(void) { /* Top of CBMEM is at highest usable DRAM address below 4GiB. */ - return (void *)restore_top_of_low_cacheable(); + return restore_top_of_low_cacheable(); } diff --git a/src/drivers/intel/fsp2_0/cbmem.c b/src/drivers/intel/fsp2_0/cbmem.c index 0efb462b40..176d256e17 100644 --- a/src/drivers/intel/fsp2_0/cbmem.c +++ b/src/drivers/intel/fsp2_0/cbmem.c @@ -3,10 +3,10 @@ #include <cbmem.h> #include <fsp/util.h> -void *cbmem_top_chipset(void) +uintptr_t cbmem_top_chipset(void) { struct range_entry tolum; fsp_find_bootloader_tolum(&tolum); - return (void *)(uintptr_t)range_entry_end(&tolum); + return range_entry_end(&tolum); } |