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authorFurquan Shaikh <furquan@google.com>2013-08-01 13:58:17 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 13:26:59 +0100
commit771c3aca70e6fa8eb0b3ad5f6b6478578bfb5e85 (patch)
treeb7802f46f2f7bb48732305d7d30869749b08082d /src/drivers
parentdb3157cfee6881d8095c4f96cd1fa5d5da9a5c68 (diff)
Slippy/Falco: Fill in right values for PHSYNC and PVSYNC in transcoder flags
Depending upon the values decoded from edid, the function decides the appropriate bits to be set in flags parameter (Important for fastboot to work correctly in kernel) Change-Id: I3b0f914dc2b0fd887eb6a1f706f87b87c86ff856 Reviewed-on: https://gerrit.chromium.org/gerrit/64265 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/4423 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/intel/gma/i915.h4
-rw-r--r--src/drivers/intel/gma/intel_ddi.c10
2 files changed, 11 insertions, 3 deletions
diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h
index 12a7ee02bb..9a6314e32b 100644
--- a/src/drivers/intel/gma/i915.h
+++ b/src/drivers/intel/gma/i915.h
@@ -228,7 +228,9 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp,
enum pipe pipe,
int type,
int lane_count,
- int pf_sz);
+ int pf_sz,
+ u8 phsync,
+ u8 pvsync);
enum transcoder intel_ddi_get_transcoder(enum port port,
enum pipe pipe);
diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c
index ff8ad4cf9e..9ddd781c97 100644
--- a/src/drivers/intel/gma/intel_ddi.c
+++ b/src/drivers/intel/gma/intel_ddi.c
@@ -163,7 +163,9 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp,
enum pipe pipe,
int type,
int lane_count,
- int pf_sz)
+ int pf_sz,
+ u8 phsync,
+ u8 pvsync)
{
u32 temp;
@@ -206,7 +208,11 @@ u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp,
}
}
- /* We need to check for TRANS_DDI_PVSYNC and TRANS_DDI_PHSYNC -- How? */
+ if (phsync)
+ temp |= TRANS_DDI_PHSYNC;
+
+ if (pvsync)
+ temp |= TRANS_DDI_PVSYNC;
if (type == INTEL_OUTPUT_HDMI) {
/* Need to understand when to set TRANS_DDI_MODE_SELECT_HDMI / TRANS_DDI_MODE_SELECT_DVI */