soc/intel/tigerlake: Update header files

Modify header files to update/include tigerlake:
  - IOMAP BARs according to silicon reference code
  - Update Serial IO devices according to PCH EDS
  - Add board types

BUG=none
BRANCH=none
TEST=Build and boot tigerlake rvp board

Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Change-Id: I185f2c22c54a6ae386527069606abb52cce1ec80
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>

0 files changed, 0 insertions, 0 deletions