diff options
author | Kevin Paul Herbert <kph@meraki.net> | 2014-12-24 18:43:20 -0800 |
---|---|---|
committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 08:50:22 +0100 |
commit | bde6d309dfafe58732ec46314a2d4c08974b62d4 (patch) | |
tree | 17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/drivers/usb/ehci_debug.c | |
parent | 4b10dec1a66122b515b2191f823d7fd379ec655f (diff) |
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/drivers/usb/ehci_debug.c')
-rw-r--r-- | src/drivers/usb/ehci_debug.c | 106 |
1 files changed, 53 insertions, 53 deletions
diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 83c23a3031..379a1bdebe 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -78,7 +78,7 @@ static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug) int loop = 0; do { - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); /* Stop when the transaction is finished */ if (ctrl & DBGP_DONE) break; @@ -92,7 +92,7 @@ static int dbgp_wait_until_complete(struct ehci_dbg_port *ehci_debug) /* Now that we have observed the completed transaction, * clear the done bit. */ - write32((unsigned long)&ehci_debug->control, ctrl | DBGP_DONE); + write32(&ehci_debug->control, ctrl | DBGP_DONE); return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl); } @@ -122,10 +122,10 @@ host_retry: if (loop == 1 || host_retries > 1) dprintk(BIOS_SPEW, "dbgp: start (@ %3d,%d) ctrl=%08x\n", loop, host_retries, ctrl | DBGP_GO); - write32((unsigned long)&ehci_debug->control, ctrl | DBGP_GO); + write32(&ehci_debug->control, ctrl | DBGP_GO); ret = dbgp_wait_until_complete(ehci_debug); - rd_ctrl = read32((unsigned long)&ehci_debug->control); - rd_pids = read32((unsigned long)&ehci_debug->pids); + rd_ctrl = read32(&ehci_debug->control); + rd_pids = read32(&ehci_debug->pids); if (rd_ctrl != ctrl_prev || rd_pids != pids_prev || (ret<0)) { ctrl_prev = rd_ctrl; @@ -184,8 +184,8 @@ static void dbgp_set_data(struct ehci_dbg_port *ehci_debug, const void *buf, int lo |= bytes[i] << (8*i); for (; i < 8 && i < size; i++) hi |= bytes[i] << (8*(i - 4)); - write32((unsigned long)&ehci_debug->data03, lo); - write32((unsigned long)&ehci_debug->data47, hi); + write32(&ehci_debug->data03, lo); + write32(&ehci_debug->data47, hi); } static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) @@ -194,8 +194,8 @@ static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) u32 lo, hi; int i; - lo = read32((unsigned long)&ehci_debug->data03); - hi = read32((unsigned long)&ehci_debug->data47); + lo = read32(&ehci_debug->data03); + hi = read32(&ehci_debug->data47); for (i = 0; i < 4 && i < size; i++) bytes[i] = (lo >> (8*i)) & 0xff; for (; i < 8 && i < size; i++) @@ -205,9 +205,9 @@ static void dbgp_get_data(struct ehci_dbg_port *ehci_debug, void *buf, int size) #if CONFIG_DEBUG_USBDEBUG static void dbgp_print_data(struct ehci_dbg_port *ehci_debug) { - u32 ctrl = read32((unsigned long)&ehci_debug->control); - u32 lo = read32((unsigned long)&ehci_debug->data03); - u32 hi = read32((unsigned long)&ehci_debug->data47); + u32 ctrl = read32(&ehci_debug->control); + u32 lo = read32(&ehci_debug->data03); + u32 hi = read32(&ehci_debug->data47); int len = DBGP_LEN(ctrl); if (len) { int i; @@ -233,13 +233,13 @@ static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, struct dbgp_pipe *p addr = DBGP_EPADDR(pipe->devnum, pipe->endpoint); pids = DBGP_PID_SET(pipe->pid, USB_PID_OUT); - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, size); ctrl |= DBGP_OUT; dbgp_set_data(ehci_debug, bytes, size); - write32((unsigned long)&ehci_debug->address, addr); - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, pipe, ctrl, pipe->timeout); @@ -264,12 +264,12 @@ static int dbgp_bulk_read(struct ehci_dbg_port *ehci_debug, struct dbgp_pipe *pi addr = DBGP_EPADDR(pipe->devnum, pipe->endpoint); pids = DBGP_PID_SET(pipe->pid, USB_PID_IN); - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, size); ctrl &= ~DBGP_OUT; - write32((unsigned long)&ehci_debug->address, addr); - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, pipe, ctrl, pipe->timeout); if (ret < 0) return ret; @@ -324,14 +324,14 @@ int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requ addr = DBGP_EPADDR(pipe->devnum, pipe->endpoint); pids = DBGP_PID_SET(pipe->pid, USB_PID_SETUP); - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, sizeof(req)); ctrl |= DBGP_OUT; /* Setup stage */ dbgp_set_data(ehci_debug, &req, sizeof(req)); - write32((unsigned long)&ehci_debug->address, addr); - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->address, addr); + write32(&ehci_debug->pids, pids); ret = dbgp_wait_until_done(ehci_debug, pipe, ctrl, 1); if (ret < 0) return ret; @@ -344,7 +344,7 @@ int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requ /* Status stage in opposite direction */ pipe->pid = USB_PID_DATA1; - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl = DBGP_LEN_UPDATE(ctrl, 0); if (read) { pids = DBGP_PID_SET(pipe->pid, USB_PID_OUT); @@ -354,7 +354,7 @@ int dbgp_control_msg(struct ehci_dbg_port *ehci_debug, unsigned devnum, int requ ctrl &= ~DBGP_OUT; } - write32((unsigned long)&ehci_debug->pids, pids); + write32(&ehci_debug->pids, pids); ret2 = dbgp_wait_until_done(ehci_debug, pipe, ctrl, pipe->timeout); if (ret2 < 0) return ret2; @@ -368,21 +368,21 @@ static int ehci_reset_port(struct ehci_regs *ehci_regs, int port) int loop; /* Reset the usb debug port */ - portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); + portsc = read32(&ehci_regs->port_status[port - 1]); portsc &= ~PORT_PE; portsc |= PORT_RESET; - write32((unsigned long)&ehci_regs->port_status[port - 1], portsc); + write32(&ehci_regs->port_status[port - 1], portsc); dbgp_mdelay(HUB_ROOT_RESET_TIME); - portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); - write32((unsigned long)&ehci_regs->port_status[port - 1], + portsc = read32(&ehci_regs->port_status[port - 1]); + write32(&ehci_regs->port_status[port - 1], portsc & ~(PORT_RWC_BITS | PORT_RESET)); loop = 100; do { dbgp_mdelay(1); - portsc = read32((unsigned long)&ehci_regs->port_status[port - 1]); + portsc = read32(&ehci_regs->port_status[port - 1]); } while ((portsc & PORT_RESET) && (--loop > 0)); /* Device went away? */ @@ -407,7 +407,7 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) for (reps = 0; reps < 3; reps++) { dbgp_mdelay(100); - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); if (status & STS_PCD) { ret = ehci_reset_port(ehci_regs, port); if (ret == 0) @@ -440,7 +440,7 @@ static int usbdebug_init_(unsigned ehci_bar, unsigned offset, struct ehci_debug_ ehci_caps = (struct ehci_caps *)ehci_bar; ehci_regs = (struct ehci_regs *)(ehci_bar + - HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase))); + HC_LENGTH(read32(&ehci_caps->hc_capbase))); struct ehci_dbg_port *ehci_debug = info->ehci_debug; @@ -453,7 +453,7 @@ try_next_time: port_map_tried = 0; try_next_port: - hcs_params = read32((unsigned long)&ehci_caps->hcs_params); + hcs_params = read32(&ehci_caps->hcs_params); debug_port = HCS_DEBUG_PORT(hcs_params); n_ports = HCS_N_PORTS(hcs_params); @@ -461,7 +461,7 @@ try_next_port: dprintk(BIOS_INFO, "n_ports: %d\n", n_ports); for (i = 1; i <= n_ports; i++) { - portsc = read32((unsigned long)&ehci_regs->port_status[i-1]); + portsc = read32(&ehci_regs->port_status[i-1]); dprintk(BIOS_INFO, "PORTSC #%d: %08x\n", i, portsc); } @@ -474,15 +474,15 @@ try_next_port: } /* Wait until the controller is halted */ - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); if (!(status & STS_HALT)) { - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); cmd &= ~CMD_RUN; - write32((unsigned long)&ehci_regs->command, cmd); + write32(&ehci_regs->command, cmd); loop = 100; do { dbgp_mdelay(10); - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); } while (!(status & STS_HALT) && (--loop > 0)); if (status & STS_HALT) dprintk(BIOS_INFO, "EHCI controller halted successfully.\n"); @@ -492,12 +492,12 @@ try_next_port: loop = 100; /* Reset the EHCI controller */ - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); cmd |= CMD_RESET; - write32((unsigned long)&ehci_regs->command, cmd); + write32(&ehci_regs->command, cmd); do { dbgp_mdelay(10); - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); } while ((cmd & CMD_RESET) && (--loop > 0)); if(!loop) { @@ -509,25 +509,25 @@ try_next_port: } /* Claim ownership, but do not enable yet */ - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl |= DBGP_OWNER; ctrl &= ~(DBGP_ENABLED | DBGP_INUSE); - write32((unsigned long)&ehci_debug->control, ctrl); + write32(&ehci_debug->control, ctrl); /* Start EHCI controller */ - cmd = read32((unsigned long)&ehci_regs->command); + cmd = read32(&ehci_regs->command); cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET); cmd |= CMD_RUN; - write32((unsigned long)&ehci_regs->command, cmd); + write32(&ehci_regs->command, cmd); /* Ensure everything is routed to the EHCI */ - write32((unsigned long)&ehci_regs->configured_flag, FLAG_CF); + write32(&ehci_regs->configured_flag, FLAG_CF); /* Wait until the controller is no longer halted */ loop = 10; do { dbgp_mdelay(10); - status = read32((unsigned long)&ehci_regs->status); + status = read32(&ehci_regs->status); } while ((status & STS_HALT) && (--loop > 0)); if(!loop) { @@ -546,13 +546,13 @@ try_next_port: /* Enable the debug port */ - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl |= DBGP_CLAIM; - write32((unsigned long)&ehci_debug->control, ctrl); - ctrl = read32((unsigned long)&ehci_debug->control); + write32(&ehci_debug->control, ctrl); + ctrl = read32(&ehci_debug->control); if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) { dprintk(BIOS_INFO, "No device in EHCI debug port.\n"); - write32((unsigned long)&ehci_debug->control, ctrl & ~DBGP_CLAIM); + write32(&ehci_debug->control, ctrl & ~DBGP_CLAIM); ret = -4; goto err; } @@ -560,9 +560,9 @@ try_next_port: #if 0 /* Completely transfer the debug device to the debug controller */ - portsc = read32((unsigned long)&ehci_regs->port_status[debug_port - 1]); + portsc = read32(&ehci_regs->port_status[debug_port - 1]); portsc &= ~PORT_PE; - write32((unsigned long)&ehci_regs->port_status[debug_port - 1], portsc); + write32(&ehci_regs->port_status[debug_port - 1], portsc); #endif dbgp_mdelay(100); @@ -577,9 +577,9 @@ try_next_port: return 0; err: /* Things didn't work so remove my claim */ - ctrl = read32((unsigned long)&ehci_debug->control); + ctrl = read32(&ehci_debug->control); ctrl &= ~(DBGP_CLAIM | DBGP_OUT); - write32((unsigned long)(unsigned long)&ehci_debug->control, ctrl); + write32(&ehci_debug->control, ctrl); //return ret; next_debug_port: |