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authorTim Chu <Tim.Chu@quantatw.com>2022-10-18 07:04:24 +0000
committerFelix Held <felix-coreboot@felixheld.de>2022-10-25 15:11:59 +0000
commit5e5335da685482bc790fffe22f1b9aab6e416248 (patch)
treee37504744c7627523dccd349209180bcd1fe6111 /src/drivers/uart
parenta52d26f2e590f5f9bf225fae677e29f9df056cd4 (diff)
src/drivers/uart: Add definition of FIFO enabled in IIR
Interrupt Identification Register (IIR) is a I/O read-access register. Add definition of FIFO enabled for this register so that we can check whether FIFO is enabled or not. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Change-Id: I12e8566822693004418cf83cae466dc3e2d612c4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68566 Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/uart')
-rw-r--r--src/drivers/uart/uart8250reg.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/drivers/uart/uart8250reg.h b/src/drivers/uart/uart8250reg.h
index 35a6845554..c6f23ac1ca 100644
--- a/src/drivers/uart/uart8250reg.h
+++ b/src/drivers/uart/uart8250reg.h
@@ -24,6 +24,7 @@
#define UART8250_IIR_THRI 0x02 /* Transmitter holding register empty */
#define UART8250_IIR_RDI 0x04 /* Receiver data interrupt */
#define UART8250_IIR_RLSI 0x06 /* Receiver line status interrupt */
+#define UART8250_IIR_FIFO_EN 0xC0 /* FIFO enabled */
#define UART8250_FCR 0x02
#define UART8250_FCR_FIFO_EN BIT(0) /* Fifo enable */