diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2015-01-09 16:54:19 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-17 09:53:39 +0200 |
| commit | 9dccf1c40bc2543ad12f6a5af9daea8d0ef0ddfa (patch) | |
| tree | d1748e53dd45497dfda184d3452a0e7fa96d6035 /src/drivers/uart | |
| parent | f7da3d2a94dc996235b296569d1eff77842fe361 (diff) | |
uart: pass register width in the coreboot table
Some SOCs (like pistachio, for instance) provide an 8250 compatible
UART, which has the same register layout, but mapped to a bus of a
different width.
Instead of adding a new driver for these controllers, it is better to
have coreboot report UART register width to libpayload, and have it
adjust the offsets accordingly when accessing the UART.
BRANCH=none
BUG=chrome-os-partner:31438
TEST=with the rest of the patches integrated depthcharge console messages
show up when running on the FPGA board
Change-Id: I30b742146069450941164afb04641b967a214d6d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2c30845f269ec6ae1d53ddc5cda0b4320008fa42
Original-Change-Id: Ia0a37cd5f24a1ee4d0334f8a7e3da5df0069cec4
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/240027
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9738
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/drivers/uart')
| -rw-r--r-- | src/drivers/uart/oxpcie_early.c | 1 | ||||
| -rw-r--r-- | src/drivers/uart/pl011.c | 1 | ||||
| -rw-r--r-- | src/drivers/uart/uart8250io.c | 1 |
3 files changed, 3 insertions, 0 deletions
diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c index 343056cdb6..9daafc5fd9 100644 --- a/src/drivers/uart/oxpcie_early.c +++ b/src/drivers/uart/oxpcie_early.c @@ -99,6 +99,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); + serial.regwidth = 1; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index e2db87760a..aa55c682a6 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -47,6 +47,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); + serial.regwidth = 1; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index 60a8d86361..2cb586e8c2 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -142,6 +142,7 @@ void uart_fill_lb(void *data) serial.type = LB_SERIAL_TYPE_IO_MAPPED; serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = default_baudrate(); + serial.regwidth = 1; lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data); |