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authorPatrick Rudolph <patrick.rudolph@9elements.com>2018-10-01 16:00:16 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-10-05 03:25:15 +0000
commitfca506d579cec575d24252e62638d9a150f51082 (patch)
tree04add1bb5cf5ced0205acd44f5b6dd591ae34459 /src/drivers/spi
parentcc335c756720ad8ba345e593a028761394443972 (diff)
drivers/spi/winbond: Add new chip
The W25Q128J is a QSPI flash chip, without ~HOLD and ~WP. Add the device id to make coreboot boot from it. Change-Id: I623fdf7d7e30eb28259bec6294785ad873f1f503 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/28861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'src/drivers/spi')
-rw-r--r--src/drivers/spi/winbond.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c
index a6089b538d..e2c653865d 100644
--- a/src/drivers/spi/winbond.c
+++ b/src/drivers/spi/winbond.c
@@ -179,6 +179,16 @@ static const struct winbond_spi_flash_params winbond_spi_flash_table[] = {
.bp_bits = 3,
},
{
+ .id = 0x7018,
+ .l2_page_size_shift = 8,
+ .pages_per_sector_shift = 4,
+ .sectors_per_block_shift = 4,
+ .nr_blocks_shift = 8,
+ .name = "W25Q128J",
+ .protection_granularity_shift = 18,
+ .bp_bits = 3,
+ },
+ {
.id = 0x4019,
.l2_page_size_shift = 8,
.pages_per_sector_shift = 4,