diff options
author | Vadim Bendebury <vbendeb@chromium.org> | 2016-04-09 18:33:49 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2016-06-23 17:14:16 +0200 |
commit | e31d24366ca5f344e8aed14bb6892ba1b8507f94 (patch) | |
tree | 876a7b63f82d6c3128cebd7051a7e25925517b97 /src/drivers/spi/tpm/tpm.h | |
parent | 50df52244ebeb019c9e4f78a1197d7200f759b51 (diff) |
tpm2: add SPI TPM driver
This introduces a SPI TPM driver compliant with the TCG issued "TPM
Profile (PTP) Specification Revision 00.43" which can be found by
googling its title.
The driver implements both the hardware flow control protocol and the
TPM state machine.
The hardware flow control allows to map SPI based TPM devices to the
LPC address space on x86 platforms, on all other platforms it needs to
be implemented in the driver software.
The tis layer is somewhat superficial, it might have to be expanded
later.
A lot more implementation details can be found in the code comments.
Also, it is worth mentioning that this is not a complete version of
the driver: its robustness needs to be improved, delay loops need to
be bound, error conditions need to propagate up the call stack.
BRANCH=none
BUG=chrome-os-partner:52132, chrome-os-partner:50645, chrome-os-partner:54141
TEST=with the rest of the patches applied coreboot is able complete
Chrome OS factory initialization of the TPM2 device.
Change-Id: I967bc5c689f6e6f345755f08cb088ad37abd5d1c
Signed-off-by: Martin Roth <martinroth@chromium.org>
Original-Commit-Id: 5611c6f7d7fe6d37da668f337f0e70263913d63e
Original-Change-Id: I17d732e66bd231c2289ec289994dd819c6276855
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/350124
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15298
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/drivers/spi/tpm/tpm.h')
-rw-r--r-- | src/drivers/spi/tpm/tpm.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/src/drivers/spi/tpm/tpm.h b/src/drivers/spi/tpm/tpm.h new file mode 100644 index 0000000000..214d3bd2df --- /dev/null +++ b/src/drivers/spi/tpm/tpm.h @@ -0,0 +1,48 @@ +/* + * Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H +#define __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H + +#include <stddef.h> +#include <spi-generic.h> + +/* + * A tpm device descriptor, values read from the appropriate device regisrers + * are cached here. + */ +struct tpm2_info { + uint16_t vendor_id; + uint16_t device_id; + uint16_t revision; +}; + +/* + * Initialize a TPM2 device: read its id, claim locality of zero, verify that + * this indeed is a TPM2 device. Use the passed in handle to access the right + * SPI port. + * + * Return 0 on success, non-zero on failure. + */ +int tpm2_init(struct spi_slave *spi_if); + + +/* + * Each command processing consists of sending the command to the TPM, by + * writing it into the FIFO register, then polling the status register until + * the TPM is ready to respond, then reading the response from the FIFO + * regitster. The size of the response can be gleaned from the 6 byte header. + * + * This function places the response into the tpm2_response buffer and returns + * the size of the response. + */ +size_t tpm2_process_command(const void *tpm2_command, size_t command_size, + void *tpm2_response, size_t max_response); + +/* Get information about previously initialized TPM device. */ +void tpm2_get_info(struct tpm2_info *info); + +#endif /* ! __COREBOOT_SRC_DRIVERS_SPI_TPM_TPM_H */ |