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author | Duncan Laurie <dlaurie@google.com> | 2017-10-26 08:44:16 -0700 |
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committer | Duncan Laurie <dlaurie@chromium.org> | 2017-11-14 21:21:37 +0000 |
commit | bfd17e34219f71e3cca458648997cb2f8f5ee2ca (patch) | |
tree | 1b92165319788ec9a6fd51c0c4d4401ec87a61d8 /src/drivers/spi/sst.c | |
parent | ebd67c23ed107d0f43c54a0d01286c90bfccd299 (diff) |
mb/google/eve: Tune I2C4 hold times
Tune PCH I2C4 hold times to ensure the frequency is always <400KHz.
BUG=b:67029862
TEST=boot on eve and measure I2C4 at Tp262 to be 385KHz
Change-Id: Ie93c5c40bc74069b285f6c3ee311f1bd7cefcaf1
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Change-Id: Iceabc806a17b9e6a144a4f6288c6cca790d03950
Original-Signed-off-by: Duncan Laurie <dlaurie@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/739841
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/spi/sst.c')
0 files changed, 0 insertions, 0 deletions