diff options
author | Aaron Durbin <adurbin@chromium.org> | 2019-12-27 15:16:17 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2020-01-06 15:00:50 +0000 |
commit | d701ef7475fe6d015a61cd91410391c3e0902f53 (patch) | |
tree | a3b1aaaaa6490b62ef7c71e9a119a41bd32d825a /src/drivers/spi/spi_flash.c | |
parent | 9e877ec60d177565776b20e3d61f723a9552ee34 (diff) |
drives/spi_flash: add spi_flash_cmd_write_page_program()
The SPI flashes that support page programming mode had duplicated
the logic for writing in every driver. Add
spi_flash_cmd_write_page_program() and use the common implementation
to reduce code size that comes from duplication. The savings is
~2.5KiB per stage where the spi flash drivers are utilized.
Change-Id: Ie6db03fa8ad33789f1d07a718a769e4ca8bffe1d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37963
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/drivers/spi/spi_flash.c')
-rw-r--r-- | src/drivers/spi/spi_flash.c | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index f0d01593f3..ff69a9a1c1 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -255,6 +255,60 @@ int spi_flash_cmd_status(const struct spi_flash *flash, u8 *reg) return spi_flash_cmd(&flash->spi, flash->status_cmd, reg, sizeof(*reg)); } +int spi_flash_cmd_write_page_program(const struct spi_flash *flash, u32 offset, + size_t len, const void *buf) +{ + unsigned long byte_addr; + unsigned long page_size; + size_t chunk_len; + size_t actual; + int ret = 0; + u8 cmd[4]; + + page_size = flash->page_size; + cmd[0] = flash->pp_cmd; + + for (actual = 0; actual < len; actual += chunk_len) { + byte_addr = offset % page_size; + chunk_len = MIN(len - actual, page_size - byte_addr); + chunk_len = spi_crop_chunk(&flash->spi, sizeof(cmd), chunk_len); + + spi_flash_addr(offset, cmd); + if (CONFIG(DEBUG_SPI_FLASH)) { + printk(BIOS_SPEW, "PP: %p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", + buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], + chunk_len); + } + + ret = spi_flash_cmd(&flash->spi, flash->wren_cmd, NULL, 0); + if (ret < 0) { + printk(BIOS_WARNING, "SF: Enabling Write failed\n"); + goto out; + } + + ret = spi_flash_cmd_write(&flash->spi, cmd, sizeof(cmd), + buf + actual, chunk_len); + if (ret < 0) { + printk(BIOS_WARNING, "SF: Page Program failed\n"); + goto out; + } + + ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT_MS); + if (ret) + goto out; + + offset += chunk_len; + } + + if (CONFIG(DEBUG_SPI_FLASH)) + printk(BIOS_SPEW, "SF: : Successfully programmed %zu bytes @ 0x%lx\n", + len, (unsigned long)(offset - len)); + ret = 0; + +out: + return ret; +} + /* * The following table holds all device probe functions * |