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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2021-08-11 21:33:53 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-08-19 13:52:38 +0000
commitc0c477741d0089fb1eb83e4c88b6ad5ba1661cb9 (patch)
treeb876ceb22cec6744c161d2ec23d82ef3e3f5719a /src/drivers/spi/gigadevice.c
parent191a8d7d2e40b9c90d81cf8e5ea3fad414afeb29 (diff)
soc/intel/alderlake: set default PL4 values for different SKUs
Set default PL4 values for various Alder Lake CPU SKUs as per bug#191906315 comment#10. BUG=b:194745919 BRANCH=None TEST=Build FW and test on brya0 board. Change-Id: I53791badbec3c165d56f20ce0656dc15d63bab37 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56917 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/spi/gigadevice.c')
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