diff options
| author | Vadim Bendebury <vbendeb@chromium.org> | 2014-10-24 13:29:43 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-20 15:33:47 +0100 |
| commit | 2a0f8cd41b3a94240d1b3d9f4d3f52b34b55aee3 (patch) | |
| tree | e7b54170448c397126b619b8bd5e8344b94f238c /src/drivers/spi/eon.c | |
| parent | b7d7412261d14e9e7a9ef5835d76cc243821b07b (diff) | |
libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication
It turns out that CB_TAG_ACPI_GNVS is handled in both x86 specific and
common coreboot table parsing code. The MRC cache case used only by
x86 is handled in the common code.
This patch restores sanity and moves processing to where it belongs.
BRANCH=none
BUG=none
TEST=verified that arm and x86 targets build.
Change-Id: Iaddaa3380725be6d08a51a96c68b70522531bafe
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0afae893d5027026cb666cd46e054aeae4e71f83
Original-Change-Id: I2c114a8469455002c51593cb8be80585925969a7
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/225457
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8752
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/drivers/spi/eon.c')
0 files changed, 0 insertions, 0 deletions