arch/riscv: provide a monotonic timer

The RISC-V Privileged Architecture specification defines the Machine
Time Registers (mtime and mtimecmp) in section 3.1.15.

Makes it possible to use the generic udelay.
The timer is enabled using RISCV_USE_ARCH_TIMER for the lowrisc,
sifive and ucb soc.

Change-Id: I5139601226e6f89da69e302a10f2fb56b4b24f38
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/27434
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

0 files changed, 0 insertions, 0 deletions