diff options
author | Hung-Te Lin <hungte@chromium.org> | 2022-09-06 14:32:05 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-07 09:20:25 +0000 |
commit | a01f8bc450d782c9b0859c8caaaa3df87fe5a854 (patch) | |
tree | b6f301ea3e7d09e256489c7c3f5918211ff9473c /src/drivers/pcie | |
parent | 70f30afa89b725aa8655bed881f823408ac54453 (diff) |
soc/mediatek: a common implementation to register BL31 reset
The implementations of register_reset_to_bl31() are the same for
MedaiTek platforms, so we extract them to soc/common/bl31.c.
BUG=None
TEST=build pass
Change-Id: I297ea2e18a6d7e92236cf415844b166523616bdf
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/drivers/pcie')
0 files changed, 0 insertions, 0 deletions