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authorWeiyi Lu <weiyi.lu@mediatek.com>2018-06-01 14:58:54 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-07-11 10:47:09 +0000
commit60e1fcb07fde803952cb7104cdd386b668f269e8 (patch)
tree02030fef3a1699cf9042c81852c92f89db321d3c /src/drivers/pc80/rtc
parent17180af69a95ad5823c501737d0ba2a0e849b4df (diff)
mediatek/mt8183: add PLL and clock init support
Add PLL and clock init code. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui. Checked with frequency meter in SOC. Change-Id: I1f561f66bcf12de6a95c2f64eecd9508bd9bb26c Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-on: https://review.coreboot.org/27031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/drivers/pc80/rtc')
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