OxPCIe uart: Split PCI bridge control

None of the PCI bridge management here is specific to the PCI UART
device/function. Also the Kconfig variable defaults are not globally
valid, fill samsung/lumpy with working values.

Change-Id: Id22631412379af1d6bf62c996357d36d7ec47ca3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5237
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

1 files changed, 3 insertions, 61 deletions

diff --git a/src/drivers/oxford/oxpcie/Kconfig b/src/drivers/oxford/oxpcie/Kconfig
index 5ad42aafb7..c2ea7b6ad8 100644
--- a/src/drivers/oxford/oxpcie/Kconfig
+++ b/src/drivers/oxford/oxpcie/Kconfig
@@ -1,68 +1,10 @@
 config DRIVERS_OXFORD_OXPCIE
 	bool "Oxford OXPCIe952"
 	default n
+	depends on PCI
 	select DRIVERS_UART_8250MEM
+	select EARLY_PCI_BRIDGE
 	help
 	  Support for Oxford OXPCIe952 serial port PCIe cards.
 	  Currently only devices with the vendor ID 0x1415 and device ID
-	  0xc158 will work.
-	  NOTE: Right now you have to set the base address of your OXPCIe952
-	  card to exactly the value that the device allocator would set them
-	  later on, or serial console functionality will stop as soon as the
-	  resource allocator assigns a new base address to the device.
-
-config OXFORD_OXPCIE_BRIDGE_BUS
-	hex "OXPCIe's PCIe bridge bus number"
-	default 0x0
-	depends on DRIVERS_OXFORD_OXPCIE
-	help
-	  While coreboot is executing code from ROM, the coreboot resource
-	  allocator has not been running yet. Hence PCI devices living behind
-	  a bridge are not yet visible to the system. In order to use an
-	  OXPCIe952 based PCIe card, coreboot has to set up the PCIe bridge
-	  that controls the OXPCIe952 controller first.
-
-config OXFORD_OXPCIE_BRIDGE_DEVICE
-	hex "OXPCIe's PCIe bridge device number"
-	default 0x1c
-	depends on DRIVERS_OXFORD_OXPCIE
-	help
-	  While coreboot is executing code from ROM, the coreboot resource
-	  allocator has not been running yet. Hence PCI devices living behind
-	  a bridge are not yet visible to the system. In order to use an
-	  OXPCIe952 based PCIe card, coreboot has to set up the PCIe bridge
-	  that controls the OXPCIe952 controller first.
-
-config OXFORD_OXPCIE_BRIDGE_FUNCTION
-	hex "OXPCIe's PCIe bridge function number"
-	default 0x2
-	depends on DRIVERS_OXFORD_OXPCIE
-	help
-	  While coreboot is executing code from ROM, the coreboot resource
-	  allocator has not been running yet. Hence PCI devices living behind
-	  a bridge are not yet visible to the system. In order to use an
-	  OXPCIe952 based PCIe card, coreboot has to set up the PCIe bridge
-	  that controls the OXPCIe952 controller first.
-
-config OXFORD_OXPCIE_BRIDGE_SUBORDINATE
-	hex "OXPCIe's PCIe bridge subordinate bus"
-	default 0x3
-	depends on DRIVERS_OXFORD_OXPCIE
-	help
-	  While coreboot is executing code from ROM, the coreboot resource
-	  allocator has not been running yet. Hence PCI devices living behind
-	  a bridge are not yet visible to the system. In order to use an
-	  OXPCIe952 based PCIe card, coreboot has to set up the PCIe bridge
-	  that controls the OXPCIe952 controller first.
-
-config OXFORD_OXPCIE_BASE_ADDRESS
-	hex "Base address for rom stage console"
-	default 0xe0400000
-	depends on DRIVERS_OXFORD_OXPCIE
-	help
-	  While coreboot is executing code from ROM, the coreboot resource
-	  allocator has not been running yet. Hence PCI devices living behind
-	  a bridge are not yet visible to the system. In order to use an
-	  OXPCIe952 based PCIe card, coreboot has to set up a temporary address
-	  for the OXPCIe952 controller.
-
+	  0xc158 or 0xc11b will work.