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authorChris Wang <chris.wang@amd.corp-partner.google.com>2020-12-23 04:29:57 +0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-25 09:11:03 +0000
commit3ec3cb82f9ad5d71d19bc461177cca19f9ec6a59 (patch)
tree09cc2e0fce5be214a614476514afe086c2f47687 /src/drivers/ocp
parent27b149c30be25359500f167cddde143e7291da93 (diff)
soc/amd/picasso: Add UPDs for support eDP power sequence adjust
Add UPDs for eDP power sequence adjust all pwr sequence numbers below are in uint of 4ms. BUG=b:171269338 TEST=Build; Verify the UPD was pass to system integrated table; measure the power on sequence on dalboz Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Change-Id: I6eceebd1c3f522e6a8dfaadc487a590107ae3131 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48864 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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