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authorAlan Huang <alan-huang@quanta.corp-partner.google.com>2022-01-18 11:39:05 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-02-14 16:12:07 +0000
commitad90edc3e07ea98e7660d25faadab169fbc74479 (patch)
tree6991791a603d33e5d72655bef4d35d739d9d1644 /src/drivers/net/chip.h
parent28894c57988076688395c8a122d79640a3702d1a (diff)
drivers/net/r8168: Add ASPM control mechanism
Add a new configuration parameter "enable_aspm_l1_2". Write value 0xe059000f to register offset 0xb0 to allow kernel driver to enable ASPM L1.2. Use Kconfig "PCIEXP_ASPM" and "enable_aspm_l1_2" to decide whether to enable ASPM L1.2. BUG=b:204309459 TEST=emerge and test if the driver can read the correct value Change-Id: I944dbf04d3ca19df4de224540bee538bff4d1f12 Signed-off-by: Alan Huang <alan-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/drivers/net/chip.h')
-rw-r--r--src/drivers/net/chip.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/drivers/net/chip.h b/src/drivers/net/chip.h
index a4ba8afc53..f253cae005 100644
--- a/src/drivers/net/chip.h
+++ b/src/drivers/net/chip.h
@@ -31,6 +31,9 @@ struct drivers_net_config {
* the device number is and the valid range is [1-10].
*/
uint8_t device_index;
+
+ /* Allow kernel driver to enable ASPM L1.2. */
+ bool enable_aspm_l1_2;
};
#endif /* __DRIVERS_R8168_CHIP_H__ */