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authorFelix Singer <felix.singer@9elements.com>2019-05-02 14:40:48 +0200
committerFelix Held <felix-coreboot@felixheld.de>2019-06-04 12:05:35 +0000
commitad5467d202408cafadd12aef6eea48b92b792a18 (patch)
tree58b34ed67ddf25e871bdd3fcc9c5c16212d09b52 /src/drivers/intel
parent59b6542bbc5aa7215aa68eca098c047924e5e118 (diff)
drivers/fsp20: Fix spelling in help text
Change-Id: Iab8d20a385bde31b29fa7766a87753fcc2d759b8 Signed-off-by: Felix Singer <felix.singer@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32544 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r--src/drivers/intel/fsp2_0/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 7fe81e51a0..3fb39d5076 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -27,7 +27,7 @@ config PLATFORM_USES_FSP2_1
select FSP_PEIM_TO_PEIM_INTERFACE
help
Include FSP 2.1 wrappers and functionality.
- Features added into FSP 2.1 specification that impacts corerboot are:
+ Features added into FSP 2.1 specification that impacts coreboot are:
1. Remove FSP stack switch and use the same stack with boot firmware
2. FSP should support external PPI interface pulled in via FSP_PEIM_TO_PEIM_INTERFACE