mrc_cache: Add mrc_cache fetch functions to support non-x86 platforms

Create two new functions to fetch mrc_cache data (replacing
mrc_cache_get_current):

- mrc_cache_load_current: fetches the mrc_cache data and drops it into
  the given buffer.  This is useful for ARM platforms where the mmap
  operation is very expensive.

- mrc_cache_mmap_leak: fetch the mrc_cache data and puts it into a
  given buffer.  This is useful for platforms where the mmap operation
  is a no-op (like x86 platforms).  As the name mentions, we are not
  freeing the memory that we allocated with the mmap, so it is the
  caller's responsibility to do so.

Additionally, we are replacing mrc_cache_latest with
mrc_cache_get_latest_slot_info, which does not check the validity of
the data when retrieving the current mrc_cache slot.  This allows the
caller some flexibility in deciding where they want the mrc_cache data
stored (either in an mmaped region or at a given address).

BUG=b:150502246
BRANCH=None
TEST=Testing on a nami (x86) device:
     reboot from ec console.  Make sure memory training happens.
     reboot from ec console.  Make sure that we don't do training again.

Signed-off-by: Shelley Chen <shchen@google.com>
Change-Id: I259dd4f550719d821bbafa2d445cbae6ea22e988
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44006
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2 files changed, 29 insertions, 32 deletions

diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index 46df1c8697..5a59c502a9 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -23,7 +23,7 @@
 static void raminit_common(struct romstage_params *params)
 {
 	bool s3wake;
-	struct region_device rdev;
+	size_t mrc_size;
 
 	post_code(0x32);
 
@@ -45,24 +45,31 @@ static void raminit_common(struct romstage_params *params)
 			/* Recovery mode does not use MRC cache */
 			printk(BIOS_DEBUG,
 			       "Recovery mode: not using MRC cache.\n");
-		} else if (CONFIG(CACHE_MRC_SETTINGS)
-			&& (!mrc_cache_get_current(MRC_TRAINING_DATA,
-							params->fsp_version,
-							&rdev))) {
-			/* MRC cache found */
-			params->saved_data_size = region_device_sz(&rdev);
-			params->saved_data = rdev_mmap_full(&rdev);
+		} else {
 			/* Assume boot device is memory mapped. */
 			assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED));
-		} else if (s3wake) {
-			/* Waking from S3 and no cache. */
-			printk(BIOS_DEBUG,
-			       "No MRC cache found in S3 resume path.\n");
-			post_code(POST_RESUME_FAILURE);
-			/* FIXME: A "system" reset is likely enough: */
-			full_reset();
-		} else {
-			printk(BIOS_DEBUG, "No MRC cache found.\n");
+
+			params->saved_data = NULL;
+			if (CONFIG(CACHE_MRC_SETTINGS))
+				params->saved_data =
+					mrc_cache_current_mmap_leak(MRC_TRAINING_DATA,
+								    params->fsp_version,
+								    &mrc_size);
+			if (params->saved_data) {
+				/* MRC cache found */
+				params->saved_data_size = mrc_size;
+
+			} else if (s3wake) {
+				/* Waking from S3 and no cache. */
+				printk(BIOS_DEBUG,
+				       "No MRC cache "
+				       "found in S3 resume path.\n");
+				post_code(POST_RESUME_FAILURE);
+				/* FIXME: A "system" reset is likely enough: */
+				full_reset();
+			} else {
+				printk(BIOS_DEBUG, "No MRC cache found.\n");
+			}
 		}
 	}
 
@@ -283,13 +290,6 @@ __weak void mainboard_add_dimm_info(
 {
 }
 
-/* Get the memory configuration data */
-__weak int mrc_cache_get_current(int type, uint32_t version,
-				struct region_device *rdev)
-{
-	return -1;
-}
-
 /* Save the memory configuration data */
 __weak int mrc_cache_stash_data(int type, uint32_t version,
 					const void *data, size_t size)
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 57a052037e..07c4463e56 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -93,8 +93,8 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
 
 static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)
 {
-	struct region_device rdev;
 	void *data;
+	size_t mrc_size;
 
 	arch_upd->NvsBufferPtr = NULL;
 
@@ -113,25 +113,22 @@ static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, uint32_t fsp_version)
 			return;
 	}
 
-	if (mrc_cache_get_current(MRC_TRAINING_DATA, fsp_version, &rdev) < 0)
-		return;
-
 	/* Assume boot device is memory mapped. */
 	assert(CONFIG(BOOT_DEVICE_MEMORY_MAPPED));
-	data = rdev_mmap_full(&rdev);
 
+	data = mrc_cache_current_mmap_leak(MRC_TRAINING_DATA, fsp_version,
+					   &mrc_size);
 	if (data == NULL)
 		return;
 
 	if (CONFIG(FSP2_0_USES_TPM_MRC_HASH) &&
-	    !mrc_cache_verify_hash(data, region_device_sz(&rdev)))
+	    !mrc_cache_verify_hash(data, mrc_size))
 		return;
 
 	/* MRC cache found */
 	arch_upd->NvsBufferPtr = data;
 
-	printk(BIOS_SPEW, "MRC cache found, size %zx\n",
-			region_device_sz(&rdev));
+	printk(BIOS_SPEW, "MRC cache found, size %zx\n", mrc_size);
 }
 
 static enum cb_err check_region_overlap(const struct memranges *ranges,