diff options
author | Aamir Bohra <aamir.bohra@intel.com> | 2018-08-27 13:36:15 +0530 |
---|---|---|
committer | Subrata Banik <subrata.banik@intel.com> | 2018-09-06 04:33:00 +0000 |
commit | 6d569e0c6b9a3e16d2a2c7276b26aba163b97dbc (patch) | |
tree | a58108b57d20b95a47c60fcfd136cd9365d67bc1 /src/drivers/intel | |
parent | c36e8bf24fdc42808be57336d7fcfb36c161859a (diff) |
intel/fsp2_0: Add fsp2.1 shared stack feature support
FSP 2.1 implementation is adding features on top of fsp2_0.
One such feature is a shared stack implementation that requires
coreboot to allocate stack for fspm and then fsp uses the same
stack as coreboot. This implementation adds support for shared
stack feature.
Change-Id: I6581111dbaddfa403eca14100577ccc8a05c4ec7
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/28358
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r-- | src/drivers/intel/fsp2_0/Kconfig | 9 | ||||
-rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 33 |
2 files changed, 34 insertions, 8 deletions
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index f14954463b..4c4dfb2f24 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -97,6 +97,15 @@ config FSP_M_XIP help Select this value when FSP-M is execute-in-place. +config FSP_USES_CB_STACK + bool + default n + help + Enable support for fsp to use same stack as coreboot. + This option allows fsp to continue using coreboot stack + without reinitializing stack pointer. This feature is + supported Icelake onwards. + config VERIFY_HOBS bool "Verify the FSP hand-off-blocks" default n diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index cf033d7077..accb70ba91 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -165,27 +165,44 @@ static enum cb_err check_region_overlap(const struct memranges *ranges, return CB_SUCCESS; } - -static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd, - bool s3wake, uint32_t fsp_version, - const struct memranges *memmap) +static enum cb_err setup_fsp_stack_frame(FSPM_ARCH_UPD *arch_upd, + const struct memranges *memmap) { uintptr_t stack_begin; uintptr_t stack_end; /* - * FSPM_UPD passed here is populated with default values provided by - * the blob itself. We let FSPM use top of CAR region of the size it - * requests. + * FSP 2.1 version would use same stack as coreboot instead of + * setting up seprate stack frame. FSP 2.1 would not relocate stack + * top and does not reinitialize stack pointer. + */ + if (IS_ENABLED(CONFIG_FSP_USES_CB_STACK)) { + arch_upd->StackBase = (void *)_car_stack_end; + arch_upd->StackSize = CONFIG_DCACHE_BSP_STACK_SIZE; + return CB_SUCCESS; + } + + /* + * FSPM_UPD passed here is populated with default values + * provided by the blob itself. We let FSPM use top of CAR + * region of the size it requests. */ stack_end = (uintptr_t)_car_region_end; stack_begin = stack_end - arch_upd->StackSize; - if (check_region_overlap(memmap, "FSPM stack", stack_begin, stack_end) != CB_SUCCESS) return CB_ERR; arch_upd->StackBase = (void *)stack_begin; + return CB_SUCCESS; +} + +static enum cb_err fsp_fill_common_arch_params(FSPM_ARCH_UPD *arch_upd, + bool s3wake, uint32_t fsp_version, + const struct memranges *memmap) +{ + if (setup_fsp_stack_frame(arch_upd, memmap)) + return CB_ERR; fsp_fill_mrc_cache(arch_upd, fsp_version); |