diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-17 13:07:30 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-06-01 13:40:20 +0000 |
| commit | fdf6d121f5382d116fd9d408525635348d64dd69 (patch) | |
| tree | 28503766bee50e84b1ad78ff729db68abdd4234d /src/drivers/intel | |
| parent | c055f3531407c06218e05973bc634d958aba779f (diff) | |
driver/intel/fsp2_0: Disable NULL deref code when calling FSP
FSP needs interrupts disable so also disable generating exceptions
around debug registers.
Change-Id: Ia49dde68d45b71e231aaf32a0e6fd847f0e06146
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64426
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel')
| -rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 14 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/notify.c | 4 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 4 |
3 files changed, 17 insertions, 5 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 4f954627e7..d6778b0846 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include <security/vboot/antirollback.h> +#include <arch/null_breakpoint.h> #include <arch/symbols.h> #include <assert.h> #include <cbfs.h> @@ -11,17 +11,18 @@ #include <fsp/api.h> #include <fsp/util.h> #include <memrange.h> +#include <mode_switch.h> #include <mrc_cache.h> #include <program_loading.h> #include <romstage_handoff.h> +#include <security/tpm/tspi.h> +#include <security/vboot/antirollback.h> +#include <security/vboot/vboot_common.h> #include <string.h> #include <symbols.h> #include <timestamp.h> -#include <security/vboot/vboot_common.h> -#include <security/tpm/tspi.h> -#include <vb2_api.h> #include <types.h> -#include <mode_switch.h> +#include <vb2_api.h> static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t)); @@ -293,6 +294,8 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) fsp_raminit = (void *)(uintptr_t)(hdr->image_base + hdr->fsp_memory_init_entry_offset); fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd); + /* FSP disables the interrupt handler so remove debug exceptions temporarily */ + null_breakpoint_disable(); post_code(POST_FSP_MEMORY_INIT); timestamp_add_now(TS_FSP_MEMORY_INIT_START); if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32)) @@ -301,6 +304,7 @@ static void do_fsp_memory_init(const struct fspm_context *context, bool s3wake) (uintptr_t)fsp_get_hob_list_ptr()); else status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); + null_breakpoint_init(); post_code(POST_FSP_MEMORY_EXIT); timestamp_add_now(TS_FSP_MEMORY_INIT_END); diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index 5cd63d8ec0..44e8795d91 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <arch/null_breakpoint.h> #include <bootstate.h> #include <console/console.h> #include <cpu/x86/mtrr.h> @@ -75,10 +76,13 @@ static void fsp_notify(enum fsp_notify_phase phase) timestamp_add_now(data->timestamp_before); post_code(data->post_code_before); + /* FSP disables the interrupt handler so remove debug exceptions temporarily */ + null_breakpoint_disable(); if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32)) ret = protected_mode_call_1arg(fspnotify, (uintptr_t)¬ify_params); else ret = fspnotify(¬ify_params); + null_breakpoint_init(); timestamp_add_now(data->timestamp_after); post_code(data->post_code_after); diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 263ea3b46d..ae5d620737 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <arch/null_breakpoint.h> #include <bootsplash.h> #include <cbfs.h> #include <cbmem.h> @@ -133,10 +134,13 @@ static void do_silicon_init(struct fsp_header *hdr) timestamp_add_now(TS_FSP_SILICON_INIT_START); post_code(POST_FSP_SILICON_INIT); + /* FSP disables the interrupt handler so remove debug exceptions temporarily */ + null_breakpoint_disable(); if (ENV_X86_64 && CONFIG(PLATFORM_USES_FSP2_X86_32)) status = protected_mode_call_1arg(silicon_init, (uintptr_t)upd); else status = silicon_init(upd); + null_breakpoint_init(); printk(BIOS_INFO, "FSPS returned %x\n", status); |