diff options
author | Frans Hendriks <fhendriks@eltan.com> | 2018-11-19 15:04:41 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-22 14:52:45 +0000 |
commit | d3799d3326ff6bb8f0ec6c6b5a6afa072be87013 (patch) | |
tree | 825d4e29ed89df2ca477a2b9d647bbcfec3484b1 /src/drivers/intel | |
parent | 9c7159649385a8ae8312d58b0f074153a68770a9 (diff) |
soc/drivers/intel/fsp1_1: Always report returned status of FspTempRamInit()
Returned status code FspTempRamInit() is not displayed when error occurs.
Move the printk() call before the check for status.
BUG=NA
TEST=Portwell PQ7-M107
Change-Id: Id87e5c765d09f4ab199db9eba07a949b031a709a
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29695
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Huang Jin <huang.jin@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r-- | src/drivers/intel/fsp1_1/bootblock.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_1/bootblock.c b/src/drivers/intel/fsp1_1/bootblock.c index cf9e134719..ce367f774f 100644 --- a/src/drivers/intel/fsp1_1/bootblock.c +++ b/src/drivers/intel/fsp1_1/bootblock.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2016 Intel Corporation. + * Copryight (C) 2018 Eltan B.V. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -51,8 +52,8 @@ void bootblock_fsp_temp_ram_init(void) fsp_temp_ram_init = (FSP_TEMP_RAM_INIT)(fih->ImageBase + fih->TempRamInitEntryOffset); status = fsp_temp_ram_init(&temp_ram_init_params); + printk(BIOS_DEBUG, "FspTempRamInit returned 0x%08x\n", status); if (status != FSP_SUCCESS) die("FspTempRamInit failed. Giving up."); - printk(BIOS_DEBUG, "FspTempRamInit returned 0x%08x\n", status); } |