diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-04-25 15:50:27 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-04-26 21:33:39 +0000 |
| commit | bc8762eaef571da9f4681d09a8ec6d2a501a8115 (patch) | |
| tree | 4831a844a0a5019b951bf650599de794282a273b /src/drivers/intel | |
| parent | 570b183f7ef72dbc5d4575719cdd582c88c37d8b (diff) | |
src: Fix a typo on "mtrr"
Change "mttrs" to mtrrs.
Change-Id: I4e5930cdcba5e8f5366bb2d4ebbcb659c0c2eb27
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/intel')
| -rw-r--r-- | src/drivers/intel/fsp1_1/include/fsp/romstage.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index 892a653769..d79be7089c 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -54,7 +54,7 @@ struct romstage_params { * 16. src/soc/intel/common/romstage.c/romstage_common - return * 17. src/mainboard/.../romstage.c/mainboard_romstage_entry - return * 18. src/soc/intel/common/romstage.c/romstage_main - return - * 19. src/soc/intel/common/stack.c/setup_stack_and_mttrs + * 19. src/soc/intel/common/stack.c/setup_stack_and_mtrrs * 20. src/drivers/intel/fsp1_1/cache_as_ram.inc - return, cleanup * after call to romstage_main * 21. FSP binary/TempRamExit |