diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-18 15:05:39 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-22 13:40:56 +0000 |
| commit | 1ef547eec7262f96770f1fe4d1c6ff44b624dbe2 (patch) | |
| tree | 208ee987a82a1a5db011fccab7e6a9ed9ef8cdb4 /src/drivers/intel | |
| parent | 385939f7cfeeb732c4a54f6069940c2a7de53579 (diff) | |
src/drivers: Remove unnecessary space after casts
Change-Id: I16689da893b5a0c3254364759d435281cb3e1caf
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69803
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel')
| -rw-r--r-- | src/drivers/intel/fsp2_0/hand_off_block.c | 4 | ||||
| -rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 6 |
2 files changed, 5 insertions, 5 deletions
diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c index f0f580b813..aae1ff8fad 100644 --- a/src/drivers/intel/fsp2_0/hand_off_block.c +++ b/src/drivers/intel/fsp2_0/hand_off_block.c @@ -261,14 +261,14 @@ static void display_fsp_version_info_hob(const void *hob) tcount = fvih->Count; #elif CONFIG(DISPLAY_FSP_VERSION_INFO_2) - uint8_t *hobstart = (uint8_t *) hob; + uint8_t *hobstart = (uint8_t *)hob; hobstart += sizeof(EFI_HOB_GUID_TYPE); const SMBIOS_TABLE_TYPE_OEM_INTEL_FVI *stfvi = (SMBIOS_TABLE_TYPE_OEM_INTEL_FVI *)hobstart; const INTEL_FIRMWARE_VERSION_INFO *fvi; - str_ptr = ((char *) &(stfvi->Fvi[0])) + + str_ptr = ((char *)&(stfvi->Fvi[0])) + (stfvi->Count * sizeof(INTEL_FIRMWARE_VERSION_INFO)); tcount = stfvi->Count; fvi = &stfvi->Fvi[0]; diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 87f77a2be6..678892ac5c 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -96,7 +96,7 @@ static void do_silicon_init(struct fsp_header *hdr) struct fsp_multi_phase_params multi_phase_params; struct fsp_multi_phase_get_number_of_phases_params multi_phase_get_number; - supd = (FSPS_UPD *) (uintptr_t)(hdr->cfg_region_offset + hdr->image_base); + supd = (FSPS_UPD *)(uintptr_t)(hdr->cfg_region_offset + hdr->image_base); fsp_verify_upd_header_signature(supd->FspUpdHeader.Signature, FSPS_UPD_SIGNATURE); @@ -127,7 +127,7 @@ static void do_silicon_init(struct fsp_header *hdr) soc_load_logo(upd); /* Call SiliconInit */ - silicon_init = (void *) (uintptr_t)(hdr->image_base + + silicon_init = (void *)(uintptr_t)(hdr->image_base + hdr->fsp_silicon_init_entry_offset); fsp_debug_before_silicon_init(silicon_init, supd, upd); @@ -165,7 +165,7 @@ static void do_silicon_init(struct fsp_header *hdr) return; /* Call MultiPhaseSiInit */ - multi_phase_si_init = (void *) (uintptr_t)(hdr->image_base + + multi_phase_si_init = (void *)(uintptr_t)(hdr->image_base + hdr->fsp_multi_phase_si_init_entry_offset); /* Implementing multi_phase_si_init() is optional as per FSP 2.2 spec */ |