diff options
author | Furquan Shaikh <furquan@google.com> | 2013-07-30 12:41:08 -0700 |
---|---|---|
committer | Patrick Georgi <patrick@georgi-clan.de> | 2013-12-21 13:26:51 +0100 |
commit | d0a81f75342508449d13fd05305864413470e0c9 (patch) | |
tree | d201c482719be707b1dbe545ac808adddcc8b340 /src/drivers/intel/gma/intel_ddi.c | |
parent | 10bd772db854c62528c67b9d0e5e329c525d83f9 (diff) |
Calculate transcoder flags based on pipe config
Works fine with all three panels with the change of 6 bits per color.
Change-Id: Ia47d152e62d1879150d8cf9a6657b62007ef5c0e
Reviewed-on: https://gerrit.chromium.org/gerrit/63762
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/4402
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/drivers/intel/gma/intel_ddi.c')
-rw-r--r-- | src/drivers/intel/gma/intel_ddi.c | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c index 220bd47100..f1a40f1e32 100644 --- a/src/drivers/intel/gma/intel_ddi.c +++ b/src/drivers/intel/gma/intel_ddi.c @@ -157,3 +157,69 @@ void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp, int port) udelay(600); } + +u32 intel_ddi_calc_transcoder_flags(u32 pipe_bpp, + enum port port, + enum pipe pipe, + int type, + int lane_count, + int pf_sz) +{ + u32 temp; + + temp = TRANS_DDI_FUNC_ENABLE; + temp |= TRANS_DDI_SELECT_PORT(port); + + switch (pipe_bpp) { + case 18: + temp |= TRANS_DDI_BPC_6; + break; + case 24: + temp |= TRANS_DDI_BPC_8; + break; + case 30: + temp |= TRANS_DDI_BPC_10; + break; + case 36: + temp |= TRANS_DDI_BPC_12; + break; + default: + printk(BIOS_ERR, "Invalid pipe_bpp: %d, *** Initialization will not succeed *** \n", pipe_bpp); + } + + if (port == PORT_A) { + switch (pipe) { + case PIPE_A: + if (pf_sz) + temp |= TRANS_DDI_EDP_INPUT_A_ONOFF; + else + temp |= TRANS_DDI_EDP_INPUT_A_ON; + break; + case PIPE_B: + temp |= TRANS_DDI_EDP_INPUT_B_ONOFF; + break; + case PIPE_C: + temp |= TRANS_DDI_EDP_INPUT_C_ONOFF; + break; + default: + printk(BIOS_ERR, "Invalid pipe %d\n", pipe); + } + } + + /* We need to check for TRANS_DDI_PVSYNC and TRANS_DDI_PHSYNC -- How? */ + + if (type == INTEL_OUTPUT_HDMI) { + /* Need to understand when to set TRANS_DDI_MODE_SELECT_HDMI / TRANS_DDI_MODE_SELECT_DVI */ + } else if (type == INTEL_OUTPUT_ANALOG) { + /* Set TRANS_DDI_MODE_SELECT_FDI with lane_count */ + } else if (type == INTEL_OUTPUT_DISPLAYPORT || + type == INTEL_OUTPUT_EDP) { + temp |= TRANS_DDI_MODE_SELECT_DP_SST; + + temp |= DDI_PORT_WIDTH(lane_count); + } else { + printk(BIOS_ERR, "Invalid type %d for pipe\n", type); + } + + return temp; +} |