drivers/intel/gma/acpi: Add Kconfigs for backlight registers

Instead of adding more versions of the `*pch.asl`, unify the existing
ones and allow to override the register locations via Kconfig. The
current defaults should work for Skylake and some newer platforms.

TEST=Booted ThinkPad X201s, backlight control still works.

Change-Id: I0b21d9a0288f0f8d6cb0a4776909bffdae7576f5
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31503
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>

1 files changed, 30 insertions, 0 deletions

diff --git a/src/drivers/intel/gma/acpi/gma.asl b/src/drivers/intel/gma/acpi/gma.asl
new file mode 100644
index 0000000000..57563933ce
--- /dev/null
+++ b/src/drivers/intel/gma/acpi/gma.asl
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+Device (GFX0)
+{
+	Name (_ADR, 0x00020000)
+
+	OperationRegion (GFXC, PCI_Config, 0x00, 0x0100)
+	Field (GFXC, DWordAcc, NoLock, Preserve)
+	{
+		Offset (0x10),
+		BAR0, 64,
+		Offset (0xe4),
+		ASLE, 32,
+		Offset (0xfc),
+		ASLS, 32,
+	}
+
+	OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000)
+	Field (GFRG, DWordAcc, NoLock, Preserve)
+	{
+		Offset (CONFIG_INTEL_GMA_BCLV_OFFSET),
+		BCLV, CONFIG_INTEL_GMA_BCLV_WIDTH,
+		Offset (CONFIG_INTEL_GMA_BCLM_OFFSET),
+		BCLM, CONFIG_INTEL_GMA_BCLM_WIDTH
+	}
+
+#include "configure_brightness_levels.asl"
+#include "common.asl"
+}