diff options
| author | Furquan Shaikh <furquan@google.com> | 2016-08-02 14:04:59 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-08-05 21:18:11 +0200 |
| commit | 35cca5a9232763a98733a25fe70527d96427cff2 (patch) | |
| tree | 0e6b5366fa252d1e105c3a0d01b11b33ccc17e28 /src/drivers/intel/fsp2_0 | |
| parent | 44d0ddcc817708403068893a5b4f72454deea355 (diff) | |
drivers/intel/fsp2_0: Ensure EC is in right mode before memory init
If EC_GOOGLE_CHROMEEC is enabled, ensure that the EC is in correct mode
before running memory init. This saves additional memory training
required in recovery path because of reboot later in ramstage.
BUG=chrome-os-partner:54245
Change-Id: Ic71c054afdcd0001cea95563fe513783b56f3e60
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/16034
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0')
| -rw-r--r-- | src/drivers/intel/fsp2_0/memory_init.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 1957cdb952..e545b6d155 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -17,6 +17,7 @@ #include <cbfs.h> #include <cbmem.h> #include <console/console.h> +#include <ec/google/chromeec/ec.h> #include <elog.h> #include <fsp/api.h> #include <fsp/util.h> @@ -295,6 +296,14 @@ void fsp_memory_init(bool s3wake) if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake) boot_count_increment(); + /* + * Before doing any memory init/training, ensure that the EC is in the + * right mode. This saves an additional memory training when in recovery + * mode. + */ + if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) + google_chromeec_early_init(); + if (cbfs_boot_locate(&file_desc, name, NULL)) { printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name); die("FSPM not available!\n"); |