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authorKeith Short <keithshort@chromium.org>2019-05-16 14:08:31 -0600
committerMartin Roth <martinroth@google.com>2019-05-22 16:54:46 +0000
commit24302633a558e545efcc84178136bd1879f6d8ee (patch)
treed1ae419a5796ffb570b9862e60884b2b9d975c1b /src/drivers/intel/fsp2_0
parentbb41aba0d8c3c3cbfee44b0f7267e78fb7d012ee (diff)
post_code: add post code for memory error
Add a new post code POST_RAM_FAILURE, used when the Intel FSP code fails to initialize RAM. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms Change-Id: Ibafefa0fc0b1c525f923929cc91731fbcc1e7533 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32773 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0')
-rw-r--r--src/drivers/intel/fsp2_0/memory_init.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 449b57d03e..60e3310a4d 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -316,7 +316,8 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake,
fsp_handle_reset(status);
if (status != FSP_SUCCESS) {
printk(BIOS_CRIT, "FspMemoryInit returned 0x%08x\n", status);
- die("FspMemoryInit returned an error!\n");
+ die_with_post_code(POST_RAM_FAILURE,
+ "FspMemoryInit returned an error!\n");
}
do_fsp_post_memory_init(s3wake, fsp_version);