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authorRizwan Qureshi <rizwan.qureshi@intel.com>2016-09-07 20:18:17 +0530
committerMartin Roth <martinroth@google.com>2016-09-12 19:52:27 +0200
commite8c2e839736917e25ddbfc6a84daf1b7ad035c74 (patch)
tree1e24a36a9154018e53628fdef88ede8f1c56d6f7 /src/drivers/intel/fsp2_0/include/fsp
parent8453c4f2fba7ae95ed14137a14575226b24218af (diff)
arch/x86: Utilize additional MTRRs in postcar_frame_add_mtrr
In the current implementation of postcar_frame_add_mtrr, if provided size is bigger than the base address alignment, the alignment is considered as size and covered by the MTRRs ignoring the specified size. In this case the callee has to make sure that the provided size should be smaller or equal to the base address alignment boundary. To simplify this, utilize additonal MTRRs to cover the entire size specified. We reuse the code from cpu/x86/mtrr/mtrr.c. Change-Id: Ie2e88b596f43692169c7d4440b18498a72fcba11 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/16509 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0/include/fsp')
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