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authorMarshall Dawson <marshalldawson3rd@gmail.com>2020-02-04 17:16:27 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-02-11 07:52:04 +0000
commit5b43484db3b41ec2b9664ef73b7e613eed813374 (patch)
tree255ec5c4d1d20c66b55692ded28aa27a82997b20 /src/drivers/intel/fsp2_0/include/fsp/soc_binding.h
parent5a1ba1bc291e1db409ee302762222095fc24deff (diff)
Documentation/soc/amd/family17: Update to match current design
The Picasso no longer intends to implement a hybrid romstage, opting instead for a more traditional bootblock/romstage/ramstage. Update the documentation to reflect this. Clarify additional details that have come to light since the last revision. Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I6c98c007ddb8a4a05810f19e4215bde719de7bb8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/38713 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/drivers/intel/fsp2_0/include/fsp/soc_binding.h')
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