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authorArthur Heymans <arthur@aheymans.xyz>2020-10-28 14:03:14 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-11-02 06:16:37 +0000
commit5a6633491158c919a5f9e0e8cf627facb3fe890e (patch)
treeb3ecab4c88d808883abf1e277d193cbd32940dbf /src/drivers/intel/fsp2_0/fspt_report.c
parentd7388d13f7aa50bc63114c7c4c12f761ed384cdd (diff)
drivers/intel/fsp2_0: Add function to report FSP-T output
This allows to compare the FSP-T output in %ecx and %edx to coreboot's CAR symbols: Change-Id: I8d79f97f8c12c63ce215935353717855442a8290 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/drivers/intel/fsp2_0/fspt_report.c')
-rw-r--r--src/drivers/intel/fsp2_0/fspt_report.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/drivers/intel/fsp2_0/fspt_report.c b/src/drivers/intel/fsp2_0/fspt_report.c
new file mode 100644
index 0000000000..7fa3205e3d
--- /dev/null
+++ b/src/drivers/intel/fsp2_0/fspt_report.c
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/symbols.h>
+#include <console/console.h>
+#include <fsp/util.h>
+
+/* filled in assembly after FSP-T ran */
+uintptr_t temp_memory_start;
+uintptr_t temp_memory_end;
+
+void report_fspt_output(void)
+{
+ const struct region fsp_car_region = {
+ .offset = temp_memory_start,
+ .size = temp_memory_end - temp_memory_start,
+ };
+ const struct region coreboot_car_region = {
+ .offset = (uintptr_t)_car_region_start,
+ .size = (uintptr_t)_car_region_size,
+ };
+ printk(BIOS_DEBUG, "FSP-T: reported temp_mem region: [0x%08lx,0x%08lx)\n",
+ temp_memory_start, temp_memory_end);
+ if (!region_is_subregion(&fsp_car_region, &coreboot_car_region)) {
+ printk(BIOS_ERR, "Wrong CAR region used!\n");
+ printk(BIOS_ERR, "Adapt CONFIG_DCACHE_RAM_BASE and CONFIG_DCACHE_RAM_SIZE to match FSP-T\n");
+ }
+}