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| author | Subrata Banik <subrata.banik@intel.com> | 2019-07-03 16:50:17 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-07-09 10:52:33 +0000 |
| commit | cb587a2522a9f5b68ee10e70832fa90eb84e6cc2 (patch) | |
| tree | 734658baeb0dc60455a8cf1c4c37c698d9bac15d /src/drivers/intel/fsp2_0/Makefile.inc | |
| parent | df29d23ee3f36d3d6a5fa0fde46beeb67554a8da (diff) | |
drivers/intel: Move FSP stage_cache implementation into common block
Change-Id: Iebb6d698c236a95162b3c7eb07987483a293b50a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34005
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/drivers/intel/fsp2_0/Makefile.inc')
| -rw-r--r-- | src/drivers/intel/fsp2_0/Makefile.inc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index d627a3dbb1..b0a1f2b4e2 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -23,7 +23,6 @@ romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c romstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c romstage-y += util.c romstage-y += memory_init.c -romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c romstage-$(CONFIG_MMA) += mma_core.c ramstage-y += debug.c @@ -34,12 +33,10 @@ ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c ramstage-y += notify.c ramstage-y += silicon_init.c -ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += util.c ramstage-$(CONFIG_MMA) += mma_core.c -postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c postcar-$(CONFIG_FSP_CAR) += temp_ram_exit.c postcar-$(CONFIG_FSP_CAR) += util.c postcar-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c |