kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme

Reorder drivers to fit src/drivers/[X]/[Y]/ scheme to make
them pluggable.

Also, fix up the following driver subdirectories by switching
to the src/drivers/[X]/[Y]/ scheme as these are hard requirements
for the main change:

* drivers/intel
* drivers/pc80
* drivers/dec

Change-Id: I455d3089a317181d5b99bf658df759ec728a5f6b
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14047
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

1 files changed, 17 insertions, 0 deletions

diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index 61faefa3b0..3e94f2fffb 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -1,3 +1,18 @@
+#
+# This file is part of the coreboot project.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
+
 romstage-y += hand_off_block.c
 romstage-y += util.c
 romstage-y += memory_init.c
@@ -9,3 +24,5 @@ ramstage-y += silicon_init.c
 ramstage-y += util.c
 
 CPPFLAGS_common += -I$(src)/drivers/intel/fsp2_0/include
+
+endif