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authorAaron Durbin <adurbin@chromium.org>2016-04-29 12:34:01 -0500
committerAaron Durbin <adurbin@chromium.org>2016-05-02 20:06:23 +0200
commitaef586548a2443f40a49f9f1f5d99c522a89480f (patch)
treed03b823af7322fe60386e026c0e573a855e2d3cb /src/drivers/intel/fsp1_1
parent800b0173c98101ee6ad2c7eaf1951a435c819fd9 (diff)
arch/x86/assembly_entry: allow early post CAR stages to use common code
The skylake-based Chromebooks use a separate verstage which runs just after bootblock and prior to romstage. The normal path for romstage would be to reload the gdt, however in the previously described scenario has verstage performing that work. Therefore, provide that path under those conditions. The only difference from the C_ENVIRONMENT_BOOTBLOCK scenario is that the stack should not be reloaded since there's no way to know the top of the stack. Change-Id: Ic39ab52a856233d3042ac02a15ae4816ddfe07c7 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14548 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1')
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