diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-12-17 11:13:01 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2016-01-18 12:15:40 +0100 |
commit | a5244c34b0cc61ea61e735fe93bf31bb74daffbe (patch) | |
tree | 8a5d1dff3e1f07cf3c652881b1a413fa7ad1d330 /src/drivers/intel/fsp1_1 | |
parent | a7feb9fa2d024ff1a925998283de46bf03a31a2c (diff) |
intel/fsp1_1: Fix enumeration timestamp and post code
The timestamps and post codes for the beginning of the FspNotify calls
are out of order. Reverse these entries to fix this error.
BRANCH=none
BUG=None
TEST=Build and run on kunimitsu
Change-Id: Ibfa1ba4b07e31bf3823469ac2dc7deaa8c67deab
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3cd63c56c59337f0ff58fd11a78d08352cf6a04a
Original-Change-Id: I4627860d3ebf446523a5662dbbc8e59153441945
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/318903
Original-Commit-Ready: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12987
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1')
-rw-r--r-- | src/drivers/intel/fsp1_1/fsp_util.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c index 14ad8c6230..1aa3aec92c 100644 --- a/src/drivers/intel/fsp1_1/fsp_util.c +++ b/src/drivers/intel/fsp1_1/fsp_util.c @@ -162,11 +162,11 @@ void fsp_notify(u32 phase) notify_phase_params.Phase = phase; if (phase == EnumInitPhaseReadyToBoot) { - timestamp_add_now(TS_FSP_BEFORE_ENUMERATE); - post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE); - } else { timestamp_add_now(TS_FSP_BEFORE_FINALIZE); post_code(POST_FSP_NOTIFY_BEFORE_FINALIZE); + } else { + timestamp_add_now(TS_FSP_BEFORE_ENUMERATE); + post_code(POST_FSP_NOTIFY_BEFORE_ENUMERATE); } status = notify_phase_proc(¬ify_phase_params); |