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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2018-11-23 11:02:17 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-27 08:46:46 +0000 |
| commit | 6c3912f0bfe659302df084f9eea0e1feb0b3e3b9 (patch) | |
| tree | c770d7b0458f01eef81924d18f7cee3b4331bdd7 /src/drivers/intel/fsp1_1 | |
| parent | 015b3dc124a448e20ea3b3f98decfae5dac26827 (diff) | |
siemens/mc_apl5: Adjust the settings for the PCIe root ports
This mainboard has four connected PCIe devices. The required root ports
are switched on and configured.
Change-Id: I82b13e1d245a172762ebd689ae136a762027033f
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/29810
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel/fsp1_1')
0 files changed, 0 insertions, 0 deletions