diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2015-12-09 16:00:18 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2015-12-11 00:20:08 +0100 |
| commit | 929b60267c72f4e2fbb23125d4c96c5dd275272b (patch) | |
| tree | f59f4e972af66c7b86e3535e8261ce5e061f4eaa /src/drivers/intel/fsp1_1/romstage.c | |
| parent | bc6e7c0905d6490ba54aee264b8dcaa09ed50ea3 (diff) | |
fsp1_1: supply fsp version to mrc_cache API
The memory init code needs to match the saved mrc data. To
ensure that invariant holds supply the FSP version when
using the mrc cache API.
BUG=chrome-os-partner:46050
BRANCH=None
TEST=Built and booted on glados. Verified version mismatch checking
works.
Change-Id: I3f6dd19cb15a18761d34509749adafc89a72ed2d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12701
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/drivers/intel/fsp1_1/romstage.c')
| -rw-r--r-- | src/drivers/intel/fsp1_1/romstage.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index b50bf734c6..16db4dfd91 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -62,11 +62,14 @@ asmlinkage void *romstage_main(FSP_INFO_HEADER *fih) /* Display parameters */ printk(BIOS_SPEW, "CONFIG_MMCONF_BASE_ADDRESS: 0x%08x\n", CONFIG_MMCONF_BASE_ADDRESS); - printk(BIOS_INFO, "Using FSP 1.1"); + printk(BIOS_INFO, "Using FSP 1.1\n"); /* Display FSP banner */ print_fsp_info(fih); + /* Stash FSP version. */ + params.fsp_version = fsp_version(fih); + /* Get power state */ params.power_state = fill_power_state(); @@ -125,7 +128,8 @@ void romstage_common(struct romstage_params *params) /* Recovery mode does not use MRC cache */ printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); - } else if (!mrc_cache_get_current(&cache)) { + } else if (!mrc_cache_get_current_with_version(&cache, + params->fsp_version)) { /* MRC cache found */ params->pei_data->saved_data_size = cache->size; params->pei_data->saved_data = &cache->data[0]; @@ -151,8 +155,10 @@ void romstage_common(struct romstage_params *params) if (params->pei_data->boot_mode != SLEEP_STATE_S3) { if (params->pei_data->data_to_save_size != 0 && params->pei_data->data_to_save != NULL) { - mrc_cache_stash_data(params->pei_data->data_to_save, - params->pei_data->data_to_save_size); + mrc_cache_stash_data_with_version( + params->pei_data->data_to_save, + params->pei_data->data_to_save_size, + params->fsp_version); } } |