diff options
| author | Wim Vervoorn <wvervoorn@eltan.com> | 2019-12-16 14:21:09 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-20 17:50:28 +0000 |
| commit | 67117c3971f16e4b47e927821a19f110b4885111 (patch) | |
| tree | 321d4462a87aaeed64b8926df22a5cf0085c80c5 /src/drivers/intel/fsp1_1/ramstage.c | |
| parent | 0e45b2875add588ddada7f40e294db99d62c3c3c (diff) | |
{drivers,soc}/intel/fsp1_1: Move chipset specific logo handling to SoC
FSP logo handling used PcdLogoPtr and PcdLogoSize which are elements of
the chipset specific FSP structures.
Create soc_load_logo() which will pass the logo pointer and size.
This function will call fsp_load_logo which will load the logo.
BUG=NA
TEST= Build and verified logo is displayed on Facebook FBG1701
Change-Id: I86943e64ca1ddd05e7e88fc6b882cfd33b98272e
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37791
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers/intel/fsp1_1/ramstage.c')
| -rw-r--r-- | src/drivers/intel/fsp1_1/ramstage.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c index 9ecdfd658a..40e79cce21 100644 --- a/src/drivers/intel/fsp1_1/ramstage.c +++ b/src/drivers/intel/fsp1_1/ramstage.c @@ -69,7 +69,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup) EFI_STATUS status; UPD_DATA_REGION *upd_ptr; VPD_DATA_REGION *vpd_ptr; - const struct cbmem_entry *logo_entry; + const struct cbmem_entry *logo_entry = NULL; /* Display the FSP header */ if (fsp_info_header == NULL) { @@ -96,13 +96,8 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup) load_vbt(is_s3_wakeup, &silicon_init_params); mainboard_silicon_init_params(&silicon_init_params); - if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) { - silicon_init_params.PcdLogoSize = 1 * MiB; - logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO, - silicon_init_params.PcdLogoSize); - silicon_init_params.PcdLogoPtr = (UINT32)cbmem_entry_start(logo_entry); - load_logo(&silicon_init_params); - } + if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) + logo_entry = soc_load_logo(&silicon_init_params); /* Display the UPD data */ if (CONFIG(DISPLAY_UPD_DATA)) @@ -122,7 +117,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup) printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); /* The logo_entry can be freed up now as it is not required any longer */ - if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) + if (logo_entry && !is_s3_wakeup) cbmem_entry_remove(logo_entry); /* Mark graphics init done after SiliconInit if VBT was provided */ @@ -214,3 +209,9 @@ __weak void soc_display_silicon_init_params( __weak void soc_silicon_init_params(SILICON_INIT_UPD *params) { } + +/* Load bmp and set FSP parameters, fsp_load_logo can be used */ +__weak const struct cbmem_entry *soc_load_logo(SILICON_INIT_UPD *params) +{ + return NULL; +} |